The underfill processing technologies for flip chip packaging

Chai, Kevin Tshun Chuan; Wu, L.

doi:10.1109/polytr.2001.973268

Cited by 11 publications

(2 citation statements)

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“…Flip chip technology provides excellent advantages of high speed signal, high input/output counts, small form factor, and more [1][2][3]. With the ongoing expansion of smart phones, tablet/ laptop computers, HDTVs, digital cameras, desktops, and more consumer products, the flip chip technology widely penetrates into microelectronic markets.…”

Section: Introductionmentioning

confidence: 99%

Cu/Ni interface study for bump reliability improvement

Wang

Liu

Hsu

et al. 2013

ASMC 2013 SEMI Advanced Semiconductor Manufacturing Conference

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Under Bump Metallization (UBM) quality is crucial to the reliability of flip chip products. This paper focuses on the failure mechanism that attributed to Temperature Humidity Bias (THB) test. The importance of metal film condition is emphasized, and the effect of voltage bias is discussed. In addition, a detailed experiment on Cu/Ni UBM interface is carried out for THB improvement. The investigation scope contains Cu surface topography and Cu/Ni interface adhesion. Based on the experiment results, the optimal process condition has been determined. A notable improvement of THB performance is achieved after process optimization.

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Section: Introductionmentioning

confidence: 99%

Cu/Ni interface study for bump reliability improvement

Wang

Liu

Hsu

et al. 2013

ASMC 2013 SEMI Advanced Semiconductor Manufacturing Conference

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“…Finally the underfill is cured by heat. Repairing of the Flip-Chip joint is usually impossible after the underfill process [2][3] [4]. The underfill process plays an important part in the Flip-Chip technology.…”

Section: Introductionmentioning

confidence: 99%

Flip-Chip Micro-Thermal Stress Simulation in Underfill Process

Lou

2007

2007 2nd IEEE International Conference on Nano/Micro Engineered and Molecular Systems

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MEMS package technology is playing an increasingly important part today. As one of important part of MEMS package technology, Flip-Chip technology is widely used in the assembly of high-performance that require good functionality on substrate space. It has many advantages such as smaller size, increased functionality and lower cost. So it has been widely used in MEMS package. The thermal stress of Flip-Chip is analyzed by using the Finite Element Analysis software in this paper. It simulates the thermal stress distributing of the Flip-Chip structure, which is caused by the high temperature during the underfill process. And by modifying all kinds of geometry parameters and material attributes, it analyses that how underfill CTE, solidifying temperature and bump size affect the thermal stress of the Micro-structure. The results from this work would be very useful to optimize the technological parameter and improve the package properties.

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Advancing packaging technology: computational fluid dynamics modeling for capillary underfill encapsulant in multi-chip heterogenous packages

Azman,

Abdullah,

Loh

et al. 2024

SSMT

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Purpose The purpose of this study is to investigate the dynamics of capillary underfill flow (CUF) in flip-chip packaging, particularly in a multi-chip configuration. The study aims to understand how various parameters, such as chip-to-chip spacing (S12), chip thickness (tc) and others, affect the underfill flow process. By using computational fluid dynamics (CFD) simulations and experimental studies, the goal is to provide insights into understanding the dynamics of CUF in heterogeneous electronic packaging. Design/methodology/approach The paper introduces a CFD analysis and experimental study on CUF in a multi-chip configuration, aiming to understand underfill flow dynamics. A 3D geometry models of multi-chip arrangement are created using computer-aided design (CAD) software. After that, the CAD models are meshed and simulated in Ansys Fluent using incompressible and non-Newtonian fluid properties. The study maintains S12 of 2.86 and tc of 22.29 between experimental and simulation data for results validation. Next, a various of S12 values (1.14, 2.86, 5.71, 8.57, 14.29 and 20) which focus on tc of 22.29 have been investigated. Further studies have been conduct using S12 of 5.71 and tc of 8.00, 14.29 and 22.29. Findings Results show a strong correlation between simulation and experiment which validate the correctness and robustness of simulation. Further parameter’s studies using simulation for various of S12 indicated that higher S12 values lead to faster flow. This effect is due to large underfill weight from reservoir able to flow into S12 region which contributed to higher mass momentum movement. Furthermore, the effect of various of tc shows that the thicker the chip the faster the underfill to flow in S12 region. Research limitations/implications The intentional exclusion of solder bump pattern arrangements from the experiment and simulation may limit the study's ability to fully understand the impact of solder bump patterns on underfill flow. Therefore, more parameters can be investigated such as solder bump pattern, underfill weight and dispense pattern in the future using CFD. Practical implications The manuscript provides a comprehensive examination of the contributions of CFD to the advancement of knowledge regarding CUF phenomena in heterogeneous electronic packaging assemblies. Moreover, it delineates the utilization of CFD methodologies to assess the influence of chip-to-chip spacing (S12) and the thickness of the chip (tc) on the underfill flow characteristics. Originality/value This paper fulfills an identified need of computational fluid dynamics method to study capillary underfill flow dynamics in heterogenous electronic packaging.

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The underfill processing technologies for flip chip packaging

Cited by 11 publications

References 0 publications

Cu/Ni interface study for bump reliability improvement

Cu/Ni interface study for bump reliability improvement

Flip-Chip Micro-Thermal Stress Simulation in Underfill Process

Advancing packaging technology: computational fluid dynamics modeling for capillary underfill encapsulant in multi-chip heterogenous packages

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