The use of laser annealing to reduce parasitic series resistances in MOS devices

Abstract

As the size of metal-oxide-semiconductor (MOS) devices continues to be scaled aggressively, new technologies must be developed in order to meet future device requirements. One area that faces serious challenges involves reducing the parasitic series resistances between the channel and the contact. In this work, we demonstrate that laser annealing is a potential alternative annealing technique to form ultra-shallow, low resistivity junctions. This method benefits from the ability to create abrupt, uniform dopant profiles with active concentrations that can exceed the equilibrium solubility limits.We also address some of the issues preventing its adaptation into the semiconductor-processing scheme, including the annealing of patterned structures, dopant deactivation and junction depth control.

Characterization of p+-n Junctions and a Quasi-One-Dimensional Structure Fabricated by Low-Energy Focused Ion Beam

“…On the other hand, it is obvious that the distribution profile was greatly affected by both primary and secondary short channel effects, which came from many reasons. First, there is no preamorphizing implant (PAI) [22]. Second, the low carrier concentration of the substrate, 1x10 15 /cm 3 , allows more room for the long tail.…”

Investigation of Spacer Engineering on n-Type Field Effect Transistor Performance during Laser Spike Annealing

“…A s metal-oxide-semiconductor (MOS) devices are scaled down continuously, the demand for an abrupt, ultra shallow and low-resistivity junction of such devices has increased and it has become a great challenging task to control the short-channel effect and obtain excellent device performance. [1][2][3][4][5] Owing to diffusion length and solid solubility limitation in rapid thermal annealing (RTA), the trade-off between junction depth and sheet resistance of source-drain extension (SDE) is a difficult issue. The laser spike annealing (LSA) technique was developed to enhance transistor performance 2,4,5) and to maintain the same dopant profile as the as-implanted and abrupt implanted profiles compared with those obtained by the conventional RTA process.…”

“…[1][2][3][4][5] Owing to diffusion length and solid solubility limitation in rapid thermal annealing (RTA), the trade-off between junction depth and sheet resistance of source-drain extension (SDE) is a difficult issue. The laser spike annealing (LSA) technique was developed to enhance transistor performance 2,4,5) and to maintain the same dopant profile as the as-implanted and abrupt implanted profiles compared with those obtained by the conventional RTA process. 2,3) The increase in wafer temperature during the LSA process depends on the light absorption ability of the surface feature of the wafer.…”