Thermal and Structural Analysis of a Suspended Physics Package for a Chip-Scale Atomic Clock

Abstract

The power dissipation for chip-scale atomic clocks (CSAC) is one of the major design considerations. 12 mW of the 30 mW power budget is for temperature control of the vertical-cavity-surface-emitting laser (VCSEL) and the alkali-metal vapor cell. Each of these must be maintained at 70+/−0.1°C even over large ambient temperature variations of 0–50°C. Thus the physics package of a CSAC device, which contains the vapor cell, VCSEL, and optical components, must have a very high thermal resistance, greater than 5.83°C/m W, to operate in 0°C ambient temperatures while dissipating less than 12 mW of power for heating. To create such a high level of insulation, the physics package is enclosed in a gold coated vacuum package and is suspended on a specially designed structure made from Cirlex, a type of polyimide. The thermal performance of the suspended physics package has been evaluated by measuring the total thermal resistance from a mockup package with and without an enclosure. Without an enclosure, the thermal resistance was found to be 1.07°C/m W. With the enclosure, the resistance increases to 1.71°C/m W. These two cases were modeled using finite element analysis (FEA), the results of which were found to match well with experimental measurements. A FEA model of the real design of the enclosed and suspended physics package was then modeled and was found to have a thermal resistance of 6.28°C/m W, which meets the project requirements of greater than 5.83°C/m W. The structural performance of the physics package was measured by shock-testing, a physics package mockup and recording the response with a high-speed video camera. The shock tests were modeled using dynamic FEA and were found to match well with the displacement measurements. A FEA model of the final design, not the mockup, of the physics package was created and was used to predict that the physics package will survive a 1800 g shock of any duration in any direction without exceeding the Cirlex yield stress of 49 MPa. In addition, the package will survive a 10,000 g shock of any duration in any direction without exceeding the Cirlex tensile stress of 229 MPa.

Thermal management of fully LTCC-packaged Cs vapour cell for MEMS atomic clock

“…Although these solutions could allow to reach a wide range of temperature such as [−40 • C, 50 • C] with a limited power consumption (especially during transient regime), they strongly complicate the system and its fabrication, and are probably not yet highly reliable [15] or not yet miniaturised enough [16]. Consequently, for now, it seems more efficient to well insulate the physics package without benefiting from all the waste heat, as it can be seen in a recent and extensive thermal study of a CSAC, free of thermal switch, for which a range [0 • C, 50 • C] was considered [17].…”

“…In addition to the range of ambient temperature, another important parameter is the target temperature (T set ). Indeed, depending on the alkali atoms or the buffer gas mixture composition, operating temperatures can be 70 • C [16,17], 75 • C [14,15] or 80 • C [12] and are always above the ambient temperature. Thereby, only warming, less power consuming than cooling, is required, so that, in steady state, the thermal flux always flows from inside (the warmest elements are the heaters) to outside, through the enclosure.…”

“…4b). These "bridges", similar to the one made of Cirlex in [17], are made of LTCC, i.e., a rather insulating material (≈2.8 W m −1 K −1 ), and their dimensions can be easily calibrated. A resistance of 17 • C/mW per bridge can then be achieved (bridges are about 0.5 mm width, 6 mm long, resistance calculation does not include the electrical leads).…”

“…From the data and guidelines discussed above, various topologies have been examined, e.g., a unique temperature-controlled insulated area supporting all the components (including some of the dissipative electronics) such as in [15,16], or a unique temperature-controlled insulated area incorporating the cell, VCSEL and the optics such as in [14,17] or only the cell [29]. Finally, our selected solution (see Fig.…”

Magnetic shield integration for a chip-scale atomic clock

“…For example the temperature-controlling elements are often micro-fabricated, 13) and a thermal isolation strategy based on the polymer suspension is widely adopted. 14,15) On the other hand, it is important to prepare the physics package (PP) in a magnetically stable environment for reliable clock operation. Magnetic isolation of most CSACs is accomplished by installing a coil and a high-permeability housing outside the PP, which inevitably leads to an increase in volume.…”