Thermal Model of a Component Package for System Level Applications

Effect of both PCB thermal conductivity and nature of forced convection environment on component operating temperature: Experimental measurement and numerical prediction

“…While these tools have the capability to assess complex thermal designs in a timely manner, previous studies have identified the ongoing need to validate numerical prediction accuracy and applicability of modelling methodologies by comparison with experimental analysis [7,8]. However, where such comparisons have been undertaken [9][10][11][12][13], these have focused mainly on characterising component performance on low conductivity test PCBs based on the recognised SEMI (Semiconductor Equipment and Materials International) or JEDEC (Joint Electronic Design Engineering Council) specifications [14,15]. Both standards specify single copper trace layer PCBs, for which a suitable modelling strategy exists [9][10][11][12][13].…”

“…However, where such comparisons have been undertaken [9][10][11][12][13], these have focused mainly on characterising component performance on low conductivity test PCBs based on the recognised SEMI (Semiconductor Equipment and Materials International) or JEDEC (Joint Electronic Design Engineering Council) specifications [14,15]. Both standards specify single copper trace layer PCBs, for which a suitable modelling strategy exists [9][10][11][12][13]. However, both SEMI and JEDEC recognised that these low conductivity test PCBs no longer represent the multilayer builds currently used in many applications and recently introduced high thermal conductivity standard test PCBs [16,17].…”