2011
DOI: 10.1088/0960-1317/21/4/045024
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Thermal nanoimprint process for high-temperature fabrication of mesoscale epitaxial exchange-biased metallic wire arrays

Abstract: A thermal nanoimprint process for the high-temperature (400 • C) fabrication of submicron, epitaxial, metallic wire arrays over areas > 1 × 1 cm 2 is reported. Based on a method using an imprinted polymeric bilayer resist template that is transferred to a metallic (molybdenum) mask, this process is enabled by an appropriate undercut profile of the Mo mask. The undercut profile is obtained from a distinctive wedge-shaped profile of the polymeric resist layers by carefully controlling the etch parameters. Using … Show more

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Cited by 13 publications
(15 citation statements)
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“…The thickness of the bilayer resist, i.e. LOR1A (90 nm) / 7010R (120 nm), 31 was optimized for our feature size of sub-100 nm dots array. Next, the coated wafer was thermally imprinted in a Nanonex NX-B100 compact thermal imprinter at 200 psi / 120 • C for a duration of 60 s. Then, RIE dry etching was performed for 25 s followed by wet development (10 s) using TMAH for selectively etching the LOR1A and achieving the undercut, as shown in figure 1(h).…”
Section: Experimental Methodsmentioning
confidence: 99%
“…The thickness of the bilayer resist, i.e. LOR1A (90 nm) / 7010R (120 nm), 31 was optimized for our feature size of sub-100 nm dots array. Next, the coated wafer was thermally imprinted in a Nanonex NX-B100 compact thermal imprinter at 200 psi / 120 • C for a duration of 60 s. Then, RIE dry etching was performed for 25 s followed by wet development (10 s) using TMAH for selectively etching the LOR1A and achieving the undercut, as shown in figure 1(h).…”
Section: Experimental Methodsmentioning
confidence: 99%
“…Therefore, the non-averaged, intrinsic, exchange bias, in all its complexity, can be studied. Such size and dimensionality effects, particularly in structures with lateral dimension of the order of their domain sizes, were studied by developing and implementing a novel Nano-imprint [19][20][21] as well as convention optical [22][23][24] lithography/patterning. However, one limitation of the NIL method is that after imprinting the material-deposition or -evaporation has to be done at around room temperature in order to keep the resists structure undisturbed.…”
Section: Research Summarymentioning
confidence: 99%
“…(a) Thermal nanoimprint process for high-temperature fabrication of mesoscale epitaxial exchange-biased metallic wire arrays [19]: A thermal nanoimprint process for the high-temperature (400 °C) fabrication of submicron, epitaxial, metallic wire arrays over areas > 1x1 cm 2 was developed. Based on a method using antimprinted polymeric bilayer resist template that is transferred to a metallic (molybdenum)mask, this process is enabled by an appropriate undercut profile of the Mo mask.…”
Section: Ii4 Advances In Nanoscale Fabricationmentioning
confidence: 99%
“…17 First, 1 lm thick polymer resist ring arrays were fabricated on the substrate by photolithography. Then, a 170 nm thick Mo sacrificial layer was deposited onto the resist ring patterns in an ion beam sputtering system, with a base pressure of 1 Â 10 À8 Torr and followed by ultrasonic assisted chemical lift-off of the resist rings.…”
Section: Introductionmentioning
confidence: 99%