Thermally Driven Multilevel Non-Volatile Memory with Monolayer MoS₂ for Brain-Inspired Artificial Learning

Abstract

The demands of modern electronic components require advanced computing platforms for efficient information processing to realize in-memory operations with a high density of data storage capabilities toward developing alternatives to von Neumann architectures. Herein, we demonstrate the multifunctionality of monolayer MoS 2 memtransistors, which can be used as a high-geared intrinsic transistor at room temperature; however, at a high temperature (>350 K), they exhibit synaptic multilevel memory operations. The temperature-dependent memory mechanism is governed by interfacial physics, which solely depends on the gate field modulated ion dynamics and charge transfer at the MoS 2 /dielectric interface. We have proposed a non-volatile memory application using a single Field Effect Transistor (FET) device where thermal energy can be ventured to aid the memory functions with multilevel (3-bit) storage capabilities. Furthermore, our devices exhibit linear and symmetry in conductance weight updates when subjected to electrical potentiation and depression. This feature has enabled us to attain a high classification accuracy while training and testing the Modified National Institute of Standards and Technology datasets through artificial neural network simulation. This work paves the way toward reliable data processing and storage using 2D semiconductors with high-packing density arrays for brain-inspired artificial learning.

Direct Transfer of Monolayer MoS2 Device Arrays for Potential Applications in Flexible Electronics

“…The linear output characteristics are observed, indicating the Ohmic contact between Ag and MoS 2 both before and after transfer cases. Such an Ohmic nature of MoS 2 -based FETs using Ag electrodes has also been reported in previous articles. ,, Interestingly, we notice an enhanced gate tuning of drain currents in transferred devices. As shown in Figure (a), the large field-effect modulation from the gate voltage variations in the transferred FET indicates the absence of Fermi-level pinning effects.…”

“…As shown in Figure (c), before the transfer, we observe a narrow clockwise hysteresis and minimal variation of transfer curves with increasing temperature up to 400 K. However, above 400 K we notice a hysteresis inversion from clockwise to anticlockwise direction and with an increase in the hysteresis window. This inversion in the hysteresis path is also observed in our previous studies which could provide interesting applications in memory and neuromorphic computing. , The hysteresis inversion arises due to additional doping of charge carriers at high temperatures, and the details of such studies can be found elsewhere . Interestingly, as shown in Figure (d), the transistor characteristics of the transferred device do not show temperature-dependent hysteresis inversion, indicating our transfer technique is capable of removing the additional charge doping effects arising from the growth substrate.…”

“…The growth of such crystals at high temperatures (>650 °C) often modifies the clean interface of the growth substrate due to charge/ion doping which could hinder their optoelectronic response for transistor applications . For example, recently, we have reported Na + ion doping in the gate dielectric via a salt-assisted CVD method that resulted in large hysteresis in the transfer characteristics of monolayer MoS 2 - and WS 2 -based field-effect transistors (FETs). , Though controlled interfacial engineering in such cases has its own advantages in multibit memory and neuromorphic computing applications, , these CVD-grown samples could be further explored to realize intrinsic transistor properties and flexible electronic applications by transferring them to application-specific target substrates. − …”

Investigating the Role of Interfacial Layer for Resistive Switching in a Hybrid Dion-Jacobson Perovskite-Based Memristor

“…Extensive endeavors have been made to pursue electronic devices that mimic the activity similar to biological systems. , Learning and self-optimization remain big challenges for advanced intelligence systems. The need to solve this issue inspires the development of alternative ways to store and process the data simultaneously.…”

Highly Reconfigurable Logic‐In‐Memory Operations in Tunable Gaussian Transistors for Multifunctional Image Processing

“…[19] However, the incompatibility of organic thin films with the state-of-the-art semiconductor technology hinders their potential in achieving high integration density and data processing-memory capability. [20] 2D layered materials offer significant opportunities for the ultimate realization of next-generation reconfigurable logic-inmemory circuits, owing to their unique physical properties including immunity against short channel effect, [21] high electrical tunability, [22] extraordinary thermal and optical sensitivity, [23,24] and flexible heterojunction integration. [25] Previous works have demonstrated 2D channel polarity dependent logic behavior via developing advanced device architectures, such as splitting gate and dual-gate.…”