A low-power noise amplifier is implemented with thin-film Si heterojunction field-effect transistors (HJFETs) and its suitability for generation of true random numbers is investigated. The HJFETs are operated at near subthreshold to obtain a large output resistance and therefore a high intrinsic gain at a low operation power. It is found that the noise output of a proof-of-concept 4-stage amplifier with a voltage gain of ∼5000, bandwidth of ∼1 KHz, power consumption of ∼100 nW, and a dc-blocking output capacitance of 250 pF is suitable for generation of statistically true random numbers at a rate of 100 bit/s without requiring post-processing. The described technique may find application in emerging technologies, such as large-area, flexible, and/or wearable devices that benefit from enhanced security and low-power computing. INDEX TERMS 1/f noise, operational amplifiers, random number generation, silicon devices, thin film transistors.