No abstract

In this letter, we demonstrate the effectiveness of the controlled spalling technology for producing high-efficiency (28.7%) thin-film InGaP/(In)GaAs/Ge tandem solar cells. The controlled spalling technique was employed to separate the as-grown solar cell structure from the host Ge wafer followed by its transfer to an arbitrary Si support substrate. The structural and electrical properties of the thin-film tandem cells were examined and compared against those on the original bulk Ge substrate. The comparison of the electrical data suggests the equivalency in cell parameters for both the thin-film (spalled) and bulk (non-spalled) cells, confirming that the controlled spalling technology does maintain the integrity of all layers in such an elaborate solar cell structure.

Hydrogenated amorphous-silicon ͑a-Si: H͒ thin-film transistors ͑TFTs͒ have been fabricated on clear plastic with highly stable threshold voltages. When operated at a gate field of 2.5 ϫ 10 5 V / cm, the threshold voltage shift extrapolated to only ϳ1.2 V after ten years. This stability is achieved by a high deposition temperature for the gate silicon nitride insulator which reduces charge trapping and high hydrogen dilution during a-Si: H growth to reduce defect creation in a-Si: H. This gate field of 2.5ϫ 10 5 V / cm is sufficient to drive phosphorescent organic light emitting diodes ͑OLEDs͒ at a brightness of 1000 Cd/ m 2. The half-life of the TFT current is over ten years, slightly longer than the luminescence half-life of high quality green OLEDs.

Stress-assisted Cu-induced lateral growth of polycrystalline germanium (poly-Ge) at temperatures as low as 150 °C has been exploited to fabricate thin-film tunneling transistors on flexible plastic substrates. Applying external compressive stress during annealing, leads to the lateral growth of poly-Ge from Cu-seeded drain/source regions, progressing into the channel area. A potential barrier is formed midway in the channel where the two lateral growth frontiers, emanating from source and drain seeded areas, meet each other. As confirmed by electrical measurements, the barrier is controlled by the gate bias. An ON/OFF ratio of 104 has been measured for these transistors, which shows the potential of these devices for switching applications.

We have made hydrogenated amorphous-silicon thin-film transistors (TFTs) at a process temperature of 300 • C on free-standing clear-plastic foil substrates. The key to the achievement of flat and smooth samples was to design the mechanical stresses in the substrate passivation and transistor layers, allowing us to obtain functional transistors over the entire active surface. Back-channel-passivated TFTs made at 300 • C on glass substrates and plastic substrates have identical electrical characteristics and gate-bias-stress stability. These results suggest that free-standing clear-plastic foil can replace display glass as a substrate from the points of process temperature, substrate and device integrity, and TFT performance and stability.Index Terms-Amorphous silicon (a-Si), gate-bias stress, mechanical stress, plastic substrate, stability, thin-film transistor (TFT).