Thin-Wafer Silicon IGBT With Advanced Laser Annealing and Sintering Process

Rahimo, Munaf; Corvasce, Chiara; Vobecký, J.; Otani, Y.; Huet, Karim

doi:10.1109/led.2012.2215304

Cited by 20 publications

(12 citation statements)

References 8 publications

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“…boron, restrained to a very thin layer near the surface without harming the underlying buried device layers, which is of critical importance for 3D integrated devices, including BackSide Illuminated CMOS Imaging Sensors (CIS) and power devices. [1][2][3] Previous studies over the last decades have demonstrated that during conventional (furnace) and rapid thermal annealing (RTA), such as spike-RTA and flash-RTA, excess Si interstitials created by ion implantation precipitate in the form of small clusters continuously transforming into different types of extended defects that evolve following an Ostwald ripening mechanism. In addition, their effect on transient enhanced diffusion (TED) [4][5] and deactivation of dopants 6 have been established.…”

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confidence: 99%

Extended Defects Formation in Nanosecond Laser-Annealed Ion Implanted Silicon

Qiu

Cristiano

Huet³

et al. 2014

Nano Lett.

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Damage evolution and dopant distribution during nanosecond laser thermal annealing of ion implanted silicon have been investigated by means of transmission electron microscopy, secondary ion mass spectrometry, and atom probe tomography. Different melting front positions were realized and studied: nonmelt, partial melt, and full melt with respect to the as-implanted dopant profile. In both boron and silicon implanted silicon samples, the most stable form among the observed defects is that of dislocation loops lying close to (001) and with Burgers vector parallel to the [001] direction, instead of conventional {111} dislocation loops or {311} rod-like defects, which are known to be more energetically favorable and are typically observed in ion implanted silicon. The observed results are explained in terms of a possible modification of the defect formation energy induced by the compressive stress developed in the nonmelted regions during laser annealing.

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confidence: 99%

Extended Defects Formation in Nanosecond Laser-Annealed Ion Implanted Silicon

Qiu

Cristiano

Huet³

et al. 2014

Nano Lett.

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“…The temperature then drops dramatically over a short distance to reach below 100 0 C at 50µm from the back surface. At the front surface it is expected to remain at room temperature condition during the annealing [8]. Therefore, laser annealing is ideally suited to the back surface n + implantation activation when temperature restriction existed at the front surface.…”

Section: Methodsmentioning

confidence: 99%

Process development and proton implanted n-type buffer optimization for 1700V rated thin wafer fast recovery diodes

Deviny

Qin

et al. 2013

2013 15th European Conference on Power Electronics and Applications (EPE)

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Developing suitable processes for thin wafer fast recovery power diodes is important for modern production plants as the substrate dimension increases. A set of emerging technologies has been employed here in order to fabricate 1700V rated fast recovery diodes from standard Si IGBT substrates without pre-diffused backside n-type buffer. Wafer grinding, n + back surface contact implant, laser annealing and multiple proton implantations were all employed here for the diode fabrication. Detailed processing parameters for each step were carefully selected and optimized for the fabrication. Both SRIM and Silvaco simulations were carried out to initially provide theoretical guide for experimental design and later compared with measured results. The fabricated diodes were tested under both static and dynamic recovery conditions. The results demonstrate that the processing technologies used here are capable of making fast recovery diodes from standard IGBT substrates.

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“…In order to improve the power handling capability of the IGBT modules, an attractive approach is to incorporate the FWD and IGBT into a monolithic silicon chip [4]. Such solution has been implemented and then the RC-IGBT appears in the market partly due to the thin-wafer processing technology in recent years [5,6,7,8]. Compared to the conventional IGBT configuration, the RC-IGBT features periodic and alternating N + short region and P + anode region at the backside.…”

Section: Introductionmentioning

confidence: 99%

A snapback-free reverse conducting IGBT with recess and floating buffer at the backside

Xie

Wei

et al. 2017

IEICE Electron. Express

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We propose two novel ways to alleviate the reverse conducting insulated gate bipolar transistor (RC-IGBT) snapback phenomenon by introducing the floating field stop layer with a lightly doped p-floating layer and recess structure at the backside. The floating field stop layer is submerged in the N-drift region and located several micrometers above the P + anode region, which would not degrade the blocking capability but can suppress the snapback phenomenon effectively. When the collector length exceeds 100 µm, the snapback voltage ΔV SB of the floating field stop RC-IGBT with the p-floating layer can be less than 0.5 V. Furthermore, the recess structure at the backside can separate the N + short and P + anode region, which will be beneficial to eliminate the snapback. Finally, an RC-IGBT with a floating buffer layer and recess at the backside is proposed. Compared to the RC-IGBT featuring an oxide trench between the N + short and P + anode, the proposed one has utilized the simple recess structure to replace the costly oxide trench and achieved the identical characteristics simultaneously.

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Thin-Wafer Silicon IGBT With Advanced Laser Annealing and Sintering Process

Cited by 20 publications

References 8 publications

Extended Defects Formation in Nanosecond Laser-Annealed Ion Implanted Silicon

Extended Defects Formation in Nanosecond Laser-Annealed Ion Implanted Silicon

Process development and proton implanted n-type buffer optimization for 1700V rated thin wafer fast recovery diodes

A snapback-free reverse conducting IGBT with recess and floating buffer at the backside

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