Thread clustering

Tam, David; Azimi, Reza; Stumm, Michael

doi:10.1145/1272996.1273004

Cited by 171 publications

(14 citation statements)

References 18 publications

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“…The statistics that are needed to implement proposed scheduling algorithm can be collected through PMUs. PMUs can provide fine-grained statistics with relatively low overhead [6]. Parekh et al [7] used hardware performance counters that provide cache miss and related information to schedule threads wisely in simultaneous multithreaded processors.…”

Section: Performance Counters and Monitoringmentioning

confidence: 99%

Adaptive Thread Scheduling in Chip Multiprocessors

Akturk

Öztürk

2019

Int J Parallel Prog

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The full potential of chip multiprocessors remains unexploited due to architecture oblivious thread schedulers employed in operating systems. We introduce an adaptive cache-hierarchy-aware scheduler that tries to schedule threads in a way that interthread contention is minimized. A novel multi-metric scoring scheme is used which specifies L1 cache access characteristics of threads. Scheduling decisions are made based on these multi-metric scores of threads.

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Section: Performance Counters and Monitoringmentioning

confidence: 99%

Adaptive Thread Scheduling in Chip Multiprocessors

Akturk

Öztürk

2019

Int J Parallel Prog

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“…Techniques that employ thread migration to improve performance include load - [Hofmeyr et al 2011;Johnson et al 2010], cache contention [Zhuravlev et al 2010], shared memory region [Tam et al 2007], and lock contention [Lozi et al 2012;Sridharan et al 2006] aware thread migration.…”

Section: Related Workmentioning

confidence: 99%

“…It is assumed that the shared-region information is known a priori. Tam et al [2007] propose a thread clustering technique to detect shared-memory regions dynamically. Clustering techniques group similar threads to reduce variation within clusters that leads to maximizing differences between clusters.…”

Section: Related Workmentioning

confidence: 99%

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Tumbler

Pusukuri

Gupta

Bhuyan

2015

ACM Trans. Archit. Code Optim.

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Schedulers used by modern OSs (e.g., Oracle Solaris 11 TM and GNU/Linux) balance load by balancing the number of threads in run queues of different cores. While this approach is effective for a single CPU multicore system, we show that it can lead to a significant load imbalance across CPUs of a multi-CPU multicore system. Because different threads of a multithreaded application often exhibit different levels of CPU utilization, load cannot be measured in terms of the number of threads alone. We propose Tumbler that migrates the threads of a multithreaded program across multiple CPUs to balance the load across the CPUs. While Tumbler distributes the threads equally across the CPUs, its assignment of threads to CPUs is aimed at minimizing the variation in utilization of different CPUs to achieve load balance. We evaluated Tumbler using a wide variety of 35 multithreaded applications, and our experimental results show that Tumbler outperforms both Oracle Solaris 11 TM and GNU/Linux.

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“…For instance, Philbin et al [11] formalise the problem of locality-aware thread scheduling for a single-core processor. In other work by Tam et al [14], threads are grouped based on data-locality for multi-threaded multi-core processors, introducing a metric of thread similarity. Furthermore, Ding and Zhong [2] propose a model to estimate locality based on reuse distances.…”

Section: Related Workmentioning

confidence: 99%

A Study of the Potential of Locality-Aware Thread Scheduling for GPUs

Nugteren

Braak

Corporaal

2014

Lecture Notes in Computer Science

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Abstract. Programming models such as CUDA and OpenCL allow the programmer to specify the independence of threads, effectively removing ordering constraints. Still, parallel architectures such as the graphics processing unit (GPU) do not exploit the potential of data-locality enabled by this independence. Therefore, programmers are required to manually perform data-locality optimisations such as memory coalescing or loop tiling. This work makes a case for locality-aware thread scheduling: re-ordering threads automatically for better locality to improve the programmability of multi-threaded processors. In particular, we analyse the potential of locality-aware thread scheduling for GPUs, considering among others cache performance, memory coalescing and bank locality. This work does not present an implementation of a locality-aware thread scheduler, but rather introduces the concept and identifies the potential. We conclude that non-optimised programs have the potential to achieve good cache and memory utilisation when using a smarter thread scheduler. A case-study of a naive matrix multiplication shows for example a 87% performance increase, leading to an IPC of 457 on a 512-core GPU.

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Thread clustering

Cited by 171 publications

References 18 publications

Adaptive Thread Scheduling in Chip Multiprocessors

Adaptive Thread Scheduling in Chip Multiprocessors

Tumbler

A Study of the Potential of Locality-Aware Thread Scheduling for GPUs

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