Through Silicon Capacitors (TSC) for noise reduction in Power Distribution Network

Dieng, Khadim; Artillan, Philippe; Bermond, C.; Guiller, Olivier; Lacrevaz, T.; Joblot, S.; Houzet, Grégory; Farcy, A.; Lamy, Yann; Flechet, B.

doi:10.1109/ectc.2015.7159600

Cited by 7 publications

(1 citation statement)

References 17 publications

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“…On the top and bottom sides of the silicon interposer, metal layers (called lids) are used to connect them in parallel, and they present associated parasitic elements (for inductive and resistive effects) that limit the decoupling function. The parasitic effects have then to be modeled and measured from dc to several gigahertz (above the resonance frequency of the components) [7].…”

Section: Modeling and Frequency Performance Analysis Of Through Silicmentioning

confidence: 99%

Modeling and Frequency Performance Analysis of Through Silicon Capacitors in Silicon Interposers

Dieng

Artillan

Bermond

et al. 2017

IEEE Trans. Compon., Packag. Manufact. Technol.

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The feasibility of cointegration of new capacitors, named "through silicon capacitors" (TSCs) with "through silicon vias" in silicon interposers has recently been demonstrated. Two architectures of TSC are extensively investigated in this paper: "axial TSC" whose electrodes are connected on either sides of the silicon interposer and "radial TSC" with electrodes both connected to the metal layers of the back end of line. A general modeling method based on distributed cell segmentation is proposed for both architectures. Validation is performed by measurements from 1 kHz to 40 GHz (above the resonance frequency of the components). A comparative study between radial and axial architectures is performed, leading to the prediction of the performances of those new components. Finally, design rules are established for future integration for power delivery networks decoupling applications.

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Section: Modeling and Frequency Performance Analysis Of Through Silicmentioning

confidence: 99%

Modeling and Frequency Performance Analysis of Through Silicon Capacitors in Silicon Interposers

Dieng

Artillan

Bermond

et al. 2017

IEEE Trans. Compon., Packag. Manufact. Technol.

Self Cite

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Electrical Model of Different Architectures of through Silicon Capacitors for High Frequency Power Distribution Network (PDN) Decoupling Operations

Dieng¹,

Bermond²,

Artillan³

et al. 2016

2016 IEEE 66th Electronic Components and Technology Conference (ECTC)

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A 56 Gbps I/O Interface Design with Exact Power Source Simulation: Total I/O Circuit Design with over 28 GHz from Driver to Receiver Device Models

Ogawa¹,

Iguchi²,

Wada

et al. 2018

2018 IEEE 68th Electronic Components and Technology Conference (ECTC)

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Through Silicon Capacitors (TSC) for noise reduction in Power Distribution Network

Cited by 7 publications

References 17 publications

Modeling and Frequency Performance Analysis of Through Silicon Capacitors in Silicon Interposers

Modeling and Frequency Performance Analysis of Through Silicon Capacitors in Silicon Interposers

Electrical Model of Different Architectures of through Silicon Capacitors for High Frequency Power Distribution Network (PDN) Decoupling Operations

A 56 Gbps I/O Interface Design with Exact Power Source Simulation: Total I/O Circuit Design with over 28 GHz from Driver to Receiver Device Models

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