Through-silicon-trench in back-side-illuminated CMOS image sensors for the improvement of gate oxide long term performance

Vici, Andrea; Russo, Felice; Lovisi, Nicola; Latessa, L.; Marchioni, Aldo; Casella, Antonio; Irrera, Fernanda

doi:10.1109/iedm.2018.8614571

Cited by 5 publications

(6 citation statements)

References 15 publications

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“…Another important issue is interface-state defects induced by direct wafer bonding in the BSI fabrication process [59]. The direct wafer bonding technique uses a high-energy ion beam irradiation for surface activation.…”

Section: Gettering Technology Design For Back-side-illuminated Cmomentioning

confidence: 99%

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Kurita

Kadono

Shigematsu

et al. 2019

Sensors

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We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

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Section: Gettering Technology Design For Back-side-illuminated Cmomentioning

confidence: 99%

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Kurita

Kadono

Shigematsu

et al. 2019

Sensors

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“…Additionally, the passivation effect of interface states upon H sintering treatment in the BSI process may be less than that in the FSI process [ 50 , 51 , 52 ]. Vici et al also reported that interface state defects are created by BSI processes such as wafer bonding and thinning [ 53 ].…”

Section: Resultsmentioning

confidence: 99%

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Onaka‐Masada

Kadono

Okuyama

et al. 2020

Sensors

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The impact of hydrocarbon-molecular (C3H6)-ion implantation in an epitaxial layer, which has low oxygen concentration, on the dark characteristics of complementary metal-oxide-semiconductor (CMOS) image sensor pixels was investigated by dark current spectroscopy. It was demonstrated that white spot defects of CMOS image sensor pixels when using a double epitaxial silicon wafer with C3H6-ion implanted in the first epitaxial layer were 40% lower than that when using an epitaxial silicon wafer with C3H6-ion implanted in the Czochralski-grown silicon substrate. This considerable reduction in white spot defects on the C3H6-ion-implanted double epitaxial silicon wafer may be due to the high gettering capability for metallic contamination during the device fabrication process and the suppression effects of oxygen diffusion into the device active layer. In addition, the defects with low internal oxygen concentration were observed in the C3H6-ion-implanted region of the double epitaxial silicon wafer after the device fabrication process. We found that the formation of defects with low internal oxygen concentration is a phenomenon specific to the C3H6-ion-implanted double epitaxial wafer. This finding suggests that the oxygen concentration in the defects being low is a factor in the high gettering capability for metallic impurities, and those defects are considered to directly contribute to the reduction in white spot defects in CMOS image sensor pixels.

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“…Unfortunately, radiation is quite common in CMOS fabrication flows especially during plasma processes, such as reactive ion etching (RIE), ashing, or plasma-enhanced chemical vapor deposition (PECVD). In our previous articles, we reported that the border traps present in BSI oxides were not found in FSI [18], [19]. This indicates that they are created during those process steps of the BSI manufacturing which are not common to the FSI configuration.…”

Section: On the Origin Of Border Traps In Bsimentioning

confidence: 92%

“…Some studies have been carried out to understand the reason for this degradation [15]- [17], but the debate is still going on and further research must be done. In recent studies, we demonstrated that, with respect to FSI, BSI-CIS gate oxides contain an additional distribution of donor-like traps [18], [19]. These traps were located within a tunneling distance from the interface (border/slow traps), reaching a density around 10 17 cm −3 at 1.8 nm.…”

mentioning

confidence: 91%

On Border Traps in Back-Side-Illuminated CMOS Image Sensor Oxides

Vici

Russo²,

Lovisi³

et al. 2020

IEEE Trans. Electron Devices

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CMOS image sensors (CISs) in back-sideilluminated configuration consist of photodiode arrays having metal lines and drive electronics beneath the active region with respect to the device/air interface so that the light reaches the photodiode active region directly. This enhances sensor quantum efficiency but reduces the electrical performance and reliability. The backside configuration is realized by flipping the wafer upside down, bonding it to a handling wafer, mechanically thinning it, and opening a through-silicon via with a long plasma etch. As a result, gate oxides in backside CISs show an increased density of donor-like border traps with respect to the conventional front-side-illuminated sensors. In this article, we try to add some information toward the comprehension of the origin and the electrical nature of those traps in backside gate oxides. To this aim, we performed negative bias temperature instability stress on p-channel MOSFETs during which the traps were filled by holes tunneling from the substrate and then studied the relaxation transients of the drain current after the stress was removed. The characteristic emission times of a few specific levels were obtained at different temperatures. This allowed us to extract values of the trap activation energies, which resulted coherent with hole-capturing E donor-like centers (trivalent silicon dangling bonds) commonly attributed to ionizing radiation. Index Terms-Backside illuminated (BSI) CMOS image sensors (CISs), gate oxide border traps, TDDS. I. INTRODUCTION A CMOS image sensor (CIS) is an array of light-sensitive pixels. Each pixel consists of a photo-diode (PD) and several control MOSFETs. In the front-side-illuminated (FSI) configuration [Fig. 1(a)], the light reaches the PD active region through the microlenses, the filters, the passivation layers, the metal lines, and the interdielectric layers [1], [2]. So, the Manuscript

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Through-silicon-trench in back-side-illuminated CMOS image sensors for the improvement of gate oxide long term performance

Cited by 5 publications

References 15 publications

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

On Border Traps in Back-Side-Illuminated CMOS Image Sensor Oxides

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