THz Detector with an Antenna Coupled Stacked CMOS Plasma-Wave FET

Abstract

We present an antenna coupled non-resonant plasmawave CMOS detector operating at 502 GHz, with a PMOS load and NMOS stacked structure. The gates of the NMOS plasma wave FETs, which are located in the middle of the stack, in a differential structure, are connected to the voltage-maximum points of a patch antenna. It was found that the high-input impedance of the detector causes high responsivity as the loaded Q of the antenna is enhanced and because the resultant high-voltage swing at the input allows the detector to have high responsivity. High input impedance can be achieved via using the stacked structure in conjunction with a small input transistor and the sub-threshold bias. The responsivity of stacked structure was also affected by source-drain voltage in the plasma-wave FET and active load resistor by PMOS. Therefore, it was found that the responsivity is closely related to the product of the stacked structure, where is the bias current, is the voltage across the input NMOS plasma-wave FET and is the small signal resistance of the PMOS load parallel with plasma -wave FET channel resistance. The detector shows the higher response than a cold-FET detector by one order of magnitude.

Short‐channel MOSFET for terahertz wave detection fabricated in 55 nm silicon CMOS process technology

“…Therefore, the channel rectifies the THz AC signal into a DC signal wherever the THz signal comes from. The rectification process or the so‐called self‐mixing takes place only in a small part of the channel [7]. As demonstrated in [8], a drain‐driven detector shows a relatively higher response among cooled (drain zero‐biased) detectors, which is more significant in a differential antenna‐coupled detector of Fig.…”

Concurrent-Mode CMOS Detector IC for Sub-Terahertz Imaging System

“…Detector bias changes the electric field effect of the detector, which requires various operating parameters. Cascode topology allows a detector to operate similar to a general amplifier, where the source, gate, and drain interfaces are simplified, thereby significantly improving the detector performance [14][15][16][17][18]. CMOS detector topologies have been proposed with commonly used gate and drain input structures, where the phase is determined by adding transconductance terms using Taylor expansion [19].…”

Responsivity enhancement techniques for CMOS source‐driven terahertz detectors

“…To improve the responsivity of MOSFET‐based detectors, various topologies of MOSFET detectors have been proposed 14 . Under the limit of noise, the researchers focused on the detectors with single MOSFET since more MOSFET always introduces more noise.…”

“…To improve the responsivity of MOSFET-based detectors, various topologies of MOSFET detectors have been proposed. 14 Under the limit of noise, the researchers focused on the detectors with single MOSFET since more MOSFET always introduces more noise. Exploring the influence of MOSFET sizes and asymmetric structures on responsivity have become the current two mainstream research directions: The effect of MOSFET size on the responsivity of the detector operated in a gate-driven configuration has been studied.…”