TIARA: Industrial Platform for Monte Carlo Single-Event Simulations in Planar Bulk, FD-SOI, and FinFET

The exponential dependence of the soft-error rate (SER) with critical charge in CMOS circuits, empirically proposed by Hazucha and Svensson, is derived in the framework of the diffusion-collection approach. A full analytical formulation is established, linking the SER with physical and technological parameters, notably the circuit supply voltage, carrier diffusion coefficient and ion characteristics.

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“…This aspect is illustrated in Fig. 13 and has been addressed in recent works [37][38][39][40][41][42]. As shown in Fig.…”

Section: Planar Versus Finfet Architecturesmentioning

confidence: 85%

Physics-Based Analytical Formulation of the Soft Error Rate in CMOS Circuits

Autran

Munteanu

2023

IEEE Trans. Nucl. Sci.

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“…MRED [16], developed at Vanderbilt University, is the core engine for CRÈME-MC [17] and provides simulations for both transient and damaging effects. TIARA [18], developed at STMicroelectronics, provides the SE rate and multiple cell upsets for planar bulk, FD-SOI and FinFET technologies. G4SEE [19] is an open-source tool provided by CERN that is still under development and provides energy depositions and SE rates.…”

Section: J Set Simulation Toolsmentioning

confidence: 99%

Single Event Transient on Combinational Logic: An Introduction and their Mitigation

Kessler

Ferraz

Rosa

et al. 2022

JICS

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Single event transients pose a major threat to the reliability of modern VLSI designs. Improving the robustness of combinational logic is challenging due to its complexity, masking effects, and signal dependence. This paper presents the mechanisms and concepts of SET generation, modeling, masking, and propagation in combinational logic. It also discusses design parameters and their impact on circuit robustness. An overview of automated design strategies for radiation hardening by design and their advantages and disadvantages is provided, covering gate sizing, gate duplication, gate remapping, load increase, layout spacing, and charge sharing techniques.

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“…The first approach is substrate isolation, specifically through the use of a Silicon-On-Insulator (SOI) structure. This structure reduces the generation of electron-hole pairs caused by heavy-ion bombardment channels by isolating the substrate [12,[17][18][19][20][21]. The second approach aims to improve the gate control capability by utilising a multi-gate Finned Field Effect Transistor (FinFETs), which has a smaller sensitive area.…”

Section: Introductionmentioning

confidence: 99%

“…The second approach aims to improve the gate control capability by utilising a multi-gate Finned Field Effect Transistor (FinFETs), which has a smaller sensitive area. This reduces the probability of charge collection [20,[22][23][24]. Additionally, structures such as the derived Gate-All-Around (GAA) [21,25] also exhibit excellent radiation resistance.…”

Section: Introductionmentioning

confidence: 99%

A New Type of Si-Based MOSFET for Radiation Reinforcement

Liu,

Zhou,

Zhang

et al. 2024

Micromachines

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This paper thoroughly analyses the role of drift in the sensitive region in the single-event effect (SEE), with the aim of enhancing the single-particle radiation resistance of N-type metal-oxide semiconductor field-effect transistors (MOSFETs). It proposes a design for a Si-based device structure that extends the lightly doped source–drain region of the N-channel metal-oxide semiconductor (NMOS), thereby moderating the electric field of the sensitive region. This design leads to a 15.69% decrease in the charge collected at the leaky end of the device under the standard irradiation conditions. On this basis, a device structure is further proposed to form a composite metal-oxide semiconductor (MOS) by connecting a pn junction at the lightly doped source–drain end. By adding two charge paths, the leakage collection charge is further reduced by 13.85% under standard irradiation conditions. Moreover, the deterioration of the drive current in the purely growing lightly doped source–drain region can be further improved. Simulations of single-event effects under different irradiation conditions show that the device has good resistance to single-event irradiation, and the composite MOS structure smoothly converges to a 14.65% reduction in drain collection charge between 0.2 pC/μm and 1 pC/μm Linear Energy Transfer (LET) values. The incidence position at the source-to-channel interface collects the highest charge reduction rate of 28.23%. The collecting charge reduction rate is maximum, at 17.12%, when the incidence is at a 45-degree angle towards the source.

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TIARA: Industrial Platform for Monte Carlo Single-Event Simulations in Planar Bulk, FD-SOI, and FinFET

Cited by 13 publications

References 12 publications

Physics-Based Analytical Formulation of the Soft Error Rate in CMOS Circuits

Physics-Based Analytical Formulation of the Soft Error Rate in CMOS Circuits

Single Event Transient on Combinational Logic: An Introduction and their Mitigation

A New Type of Si-Based MOSFET for Radiation Reinforcement

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