Time delay handling in dominant pole placement with PID controllers to obtain stability regions using random sampling

Abstract

This paper proposes a new formulation of proportional-integral-derivative (PID) controller design using the dominant pole placement method for handling second order plus time delay (SOPTD) systems. The proposed method does not contain any finite term approximation like different orders of Pade for handling the time-delay term, in the quasi-polynomial characteristic equation. Rather it transforms the transcendental exponential delay term of the plant into finite number of discrete-time poles by a suitable choice of the sampling time. The PID controller has been represented by Tustin's discretization method and the PID controller gains are obtained using the dominant pole placement criterion where the plant is discretized using the pole-zero matching method. A random search and optimization method has been used to obtain the stability region in the desired closed loop parameters space by minimising the integral squared error (ISE) criterion by randomly sampling from the stabilizable region and then these closed loop parameters are mapped on to the PID controller gains. Effectiveness of the proposed methodology is shown for nine test-bench plants with different lag to delay ratios and open loop damping levels, and the effect of choosing different sampling times, using credible numerical simulations.

Stability Analysis With LMI Based Distributed H ∞ Controller for Vehicle Platooning Under Random Multiple Packet Drops

“…Fig. 5 shows that all the closed-loop zeros are on the centre of the unit circle and all poles are within the unit circle for both topologies, but the closed-loop poles are shifting more towards high frequency and low damping when BPF topology is used, compared to BPLF topology, which defines the degradation of stability as reported in [53]. Therefore, Fig.…”

“…In Fig. 8, it is seen that the closed-loop poles are moving towards high frequency and low damping when T s is increasing for system (16) at N = 10 with both BPF and BPLF topologies, thus, both stability and performances are degrading [44], [53]. The closed-loop poles are moving faster towards high frequency and low damping as T s is increasing when BPF topology is used as compared to BPLF topology.…”

Filtered PID Control Loop for Third Order Plants With Delay: Dominant Pole Placement Approach

“…The real controller is specified by three gains P r , D r , I r and time constant f T for the proportional, derivative, integration actions and filtering effect, respectively. To transform the controller description into parameterized form consistent with plant model ( 16) the relative time variable t is introduced and ( 17) is multiplied by K in the same way as input u on the right-hand side of (16). Then the following controller description is obtained…”

“…The latter tuning is also applicable to the dominant delay processes but assuming no pole-zero cancellation within the control loop. In [14]- [16] the polezero matching method is applied to inexact dominant pole placement which is free of any delay term approximation, and in [17] a universal map of PID tuning for the secondorder processes with dominant delay is presented.…”

Dominant pole region assignment with discrete time PI, PID and PIR controllers

“…Diğer taraftan, kapalı çevrim sistemin kutuplarının keyfi olarak yerleştirilmesi özellikle yüksek mertebeden sistemler için her zaman mümkün olmayabilir. Bu durumun önüne geçmek için, baskın kutup atama yöntemi kullanılabilir [2]- [7]. Baskın kutup atama yönteminde, kapalı çevrim sistemin aşım ve yerleşme zamanı gibi performans özellikleri daha çok baskın bölgedeki kutuplar tarafından belirlendiğinden, kapalı çevrim sistemin kutuplarından ikisinin baskın bölgede, kalan kutupların ise mümkün olduğunca baskın kutuplardan uzakta (genellikle 3-5 kat) konumlanması istenir [8].…”