2020
DOI: 10.1109/mssc.2020.2987536
|View full text |Cite
|
Sign up to set email alerts
|

Time-Encoding Analog-to-Digital Converters: Bridging the Analog Gap to Advanced Digital CMOS-Part 1: Basic Principles

Abstract: I. MOTIVATION FOR TIME ENCODINGThe scaling of CMOS technology deep into the nanometer range has created challenges for the design of high-performance analog integrated circuits. The shrinking supply voltage and the presence of mismatch and noise restrain the dynamic range, causing analog circuits to be large in area and have a high power consumption in spite of the process scaling. Analog circuits based on time encoding [1], [2] and hybrid analog/digital signal processing [3] have been developed to overcome th… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

1
35
0

Year Published

2020
2020
2023
2023

Publication Types

Select...
5
1

Relationship

1
5

Authors

Journals

citations
Cited by 55 publications
(37 citation statements)
references
References 39 publications
1
35
0
Order By: Relevance
“…1 (whether bottom or top driven) is obtained, which is catastrophically nonlinear. A standard technique to improve this is the use of a pseudo-differential set-up (see discussion in Part 1 [3]). However, even then the large-signal linearity is still far from acceptable for most applications.…”
Section: Architectures For Improved Linearitymentioning
confidence: 99%
See 4 more Smart Citations
“…1 (whether bottom or top driven) is obtained, which is catastrophically nonlinear. A standard technique to improve this is the use of a pseudo-differential set-up (see discussion in Part 1 [3]). However, even then the large-signal linearity is still far from acceptable for most applications.…”
Section: Architectures For Improved Linearitymentioning
confidence: 99%
“…The phase detector shown in the figure uses only 1 VCO output phase, but it is also possible to use multiple VCO output phases for improved performance [3]. The underlying mechanism of this architecture can readily be understood by reasoning on the established phase-domain model of a VCO as an integrator (see Part 1 [3]). In this way the depicted architecture of Fig.…”
Section: A Closed-loop Vco-based Architecturesmentioning
confidence: 99%
See 3 more Smart Citations