Titanium nitride as promising gate electrode for MOS technology

Lima, Lucas Petersen Barbosa; Moreira, Milena A.; Diniz, J. A.; Dói, I.

doi:10.1002/pssc.201100506

Cited by 11 publications

(5 citation statements)

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“…The source and drain contact resistance (R C = 8.4 × 10 −10 Ω cm 2 ) of the NS-FET severely affects the device's ON-resistance [25]. Titanium nitride (TiN) is selected as a gate electrode due to its engineered work function properties and Tungsten (W) is used as the source and drain electrode material in this simulation [26,27]. The spatial quantum confinement and electrostatic phenomenon is addressed by incorporating models like modified local density approximation (MLDA) in the NS-FET.…”

Section: Device Structure and Simulation Methodologymentioning

confidence: 99%

Investigation of ambient temperature and thermal contact resistance induced self-heating effects in nanosheet FET

Rathore¹,

Jaisawal²,

Suryavanshi³

et al. 2022

Semicond. Sci. Technol.

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Self-heating effect (SHE) is a severe issue in advanced nano-scaled devices such as stacked nanosheet field-effect transistors (NS-FET), which raises the device temperature (TD), that ultimately affects the key electrical characteristics, i.e., threshold voltage (VT), DIBL, subthreshold slope (SS), IOFF, ION, etc. SHE puts design constraints in the advanced CMOS logic devices and circuits. In this paper, we thoroughly investigated the impact of ambient temperature and interface thermal contact resistance induced-self heating effect in the NS-FET using extensive numerical simulations. The weak electron-phonon coupling, phonon scattering, and the ambient temperature-induced joule energy directly coupled with thermal contact resistance cause the SHE-induced thermal degradation, which increases the device temperature (TD) and affects the device reliability. The baseline NS-FET is well-calibrated with the experimental data and 3D quantum corrected drift-diffusion coupled hydrodynamic and thermodynamic transport models is used in our TCAD framework to estimate the impact of ambient temperature and interface thermal contact resistance on the device performance. Moreover, we also evaluate the SHE-induced performance comparison of NS-FET with conventional FinFET and found that thermal degradation in NS-FET potentially worsen the electrical characteristics. Thus, a detailed TCAD analysis shows that the ambient temperature and interface thermal contact resistances deteriorate the effective thermal resistance (Reff) and device performance metrics.

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Section: Device Structure and Simulation Methodologymentioning

confidence: 99%

Investigation of ambient temperature and thermal contact resistance induced self-heating effects in nanosheet FET

Rathore¹,

Jaisawal²,

Suryavanshi³

et al. 2022

Semicond. Sci. Technol.

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“…The design parameters used for the simulations are summarized in Table 1. In the modern integrated chip (IC) process, the grain size of the metal gate has a range of approximately 5 to 20 nm [39,40]. The grain size decreases when the DC (direct current) power of the sputtering process increases [40].…”

Section: Device Structure and Simulation Methodsmentioning

confidence: 99%

“…In the modern integrated chip (IC) process, the grain size of the metal gate has a range of approximately 5 to 20 nm [39,40]. The grain size decreases when the DC (direct current) power of the sputtering process increases [40]. On the other hand, the grain size increases when the process temperature increases during or after the deposition process [39,41].…”

Section: Device Structure and Simulation Methodsmentioning

confidence: 99%

Analysis of Work-Function Variation Effects in a Tunnel Field-Effect Transistor Depending on the Device Structure

Kım

Kim

et al. 2020

Applied Sciences

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Metal gate technology is one of the most important methods used to increase the low on-current of tunnel field-effect transistors (TFETs). However, metal gates have different work-functions for each grain during the deposition process, resulting in work-function variation (WFV) effects, which means that the electrical characteristics vary from device to device. The WFV of a planar TFET, double-gate (DG) TFET, and electron-hole bilayer TFET (EHBTFET) were examined by technology computer-aided design (TCAD) simulations to analyze the influences of device structure and to find strategies for suppressing the WFV effects in TFET. Comparing the WFV effects through the turn-on voltage (Vturn-on) distribution, the planar TFET showed the largest standard deviation (σVturn-on) of 20.1 mV, and it was reduced by −26.4% for the DG TFET and −80.1% for the EHBTFET. Based on the analyses regarding metal grain distribution and energy band diagrams, the WFV of TFETs was determined by the number of metal grains involved in the tunneling current. Therefore, the EHBTFET, which can determine the tunneling current by all of the metal grains where the main gate and the sub gate overlap, is considered to be a promising structure that can reduce the WFV effect of TFETs.

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“…In the semiconductor industry, it is used as a diffusion barrier between interconnect metals such as copper (Cu) with dielectric layers. In addition, it is employed as metal gate electrodes due to its chemical stability and good adhesion to the substrates [1][2][3][4][5]. TiN is also highly resistant to corrosion and can withstand high temperatures, making it suitable for use in the aerospace and automotive industries, such as in wear-resistant coating and other high-stress applications [6][7][8].…”

Section: Introductionmentioning

confidence: 99%

Fluorination of TiN, TiO2, and SiO2 Surfaces by HF toward Selective Atomic Layer Etching (ALE)

Jung

Shong

2023

Coatings

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As semiconductor devices become miniaturized, the importance of the molecular-level understanding of the fabrication processes is growing. Titanium nitride (TiN) is an important material utilized in various architectural components of semiconductor devices requiring precise control over size and shape. A reported process for atomic layer etching (ALE) of TiN involves surface oxidation into titanium oxide (TiO2) and selective oxidized layer removal by hydrogen fluoride (HF). However, the chemical selectivity of these Ti-based materials in the etching process by HF remains unclear. In this study, computational chemistry methods utilizing density functional theory (DFT) calculations were applied to the fluorination reactions of TiN, TiO2, and SiO2 to identify and compare the surface chemical reactivity of these substrates toward etching processes. It is shown that the materials can be etched using HF, leaving TiF4 and SiF4 as the byproducts. However, while such a TiN reaction is thermodynamically hindered, the etching of TiO2 and SiO2 is suggested to be favorable. Our study provides theoretical insights into the fluorination reactivity of TiN, which has not been reported previously regardless of technological importance. Furthermore, we explore the etching selectivity between TiN, TiO2, and SiO2, which is a crucial factor in the ALE process conditions of TiN.

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Titanium nitride as promising gate electrode for MOS technology

Cited by 11 publications

References 0 publications

Investigation of ambient temperature and thermal contact resistance induced self-heating effects in nanosheet FET

Investigation of ambient temperature and thermal contact resistance induced self-heating effects in nanosheet FET

Analysis of Work-Function Variation Effects in a Tunnel Field-Effect Transistor Depending on the Device Structure

Fluorination of TiN, TiO2, and SiO2 Surfaces by HF toward Selective Atomic Layer Etching (ALE)

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