Top-Gate Short Channel Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistors With Sub-1.2 nm Equivalent Oxide Thickness

Abstract

We report high performance top-gate amorphous Indium-Gallium-Zinc-Oxide thin film transistors (α-IGZO TFTs) featuring the ultra-scaled equivalent oxide thickness (EOT) of sub-1.2 nm, achieving a decent peak transconductance (Gm) of 62 μS/μm at a drain to source voltage (VDS) of 2 V (33.4 μS/μm at VDS of 1 V) and an excellent drain induced barrier lowering (DIBL) of 17.6 mV/V, for a device with a channel length (LCH) of 160 nm. The best long channel device has a subthreshold swing (SS) of 67.5 mV/decade. This is enabled by using an aggressively scaled 5 nm high-k HfO2 as the gate dielectric. In addition, temperature study has been performed on α-IGZO TFTs. The key performance figure-of-merits, like field effect mobility (μeff), show negligible degradation at high temperature, indicating the great potential of α-IGZO TFTs for various emerging applications.

High-Performance Self-Aligned Top-Gate Amorphous InGaZnO TFTs With 4 nm-Thick Atomic-Layer-Deposited AlOx Insulator

“…Thus, the dielectric constant of the 4-nm AlO x is extracted to be 6.5, close to the reported values of ALD AlO x [17]. The capacitance-voltage (C-V) characteristics stay almost constant in a wide frequency range from 1 kHz to 500 kHz, indicating the absence of common hydrogen-related mobile ions or dipoles in high-k dielectrics [11], [14], [22]. Both current and capacitance measurements verify the excellent insulating properties of the 4-nm-thick ALD AlO x , being better than the reported high-k candidates [9]- [14], [16]- [21].…”

“…In order to reduce the equivalent oxide thickness (EOT) of GI, various high-k dielectrics have been investigated, such as HfO x [9]- [11], ZrO 2 [12], Ta 2 O 5 [13], and HfAlO x [14].…”

“…However, the trapping states populated at the high-k GI/channel interface and the insufficient interface band offset [1] would lead to poor device characteristics, such as high I off [12], low on/off current ratio [10], [13], large SS value [13], and negative threshold voltage (V th ) shift [11]. The influences of ultrathin high-k GI on stabilities could be more problematic, especially considering the rare report [14].…”

Near-Ideal Top-Gate Controllability of InGaZnO Thin-Film Transistors by Suppressing Interface Defects with an Ultrathin Atomic Layer Deposited Gate Insulator

“…In order to enhance the gate controllability in short-channel AOS transistors, various high- k dielectrics deposited by atomic layer deposition (ALD) have been investigated to considerably reduce the equivalent oxide thickness (EOT) of the GI, such as HfO x , − LaAlO 3 , HfAlO x , and AlO x . − However, the conduction band offset (Δ E c ) between the AOS channel and high- k GI is lower than that between AOS and SiO 2 , which can arise the risk of charge injection to the conduction band of GI. , Among these dielectrics, AlO x has the largest Δ E c with a-IGZO, , which makes AlO x the most favorable high- k GI for AOS TFTs.…”

“…However, the self-aligned top-gate (SATG) AOS TFT with smaller parasitic capacitance and better scalability , is preferred by the advanced applications, wherein the post-AOS GI deposition places a daunting challenge on realizing ultrathin top-gate (TG) EOT with ALD high- k dielectrics. The associated ALD processes with chemically reactive species often induced abundant defect states at the GI/channel interface − and in the AOS channel. , These defect states can result in the increased off-state current ( I off ), a reduced on/off ratio, poor subthreshold swing (SS), and a negative threshold voltage ( V th ) shift, , while the defect-sensitive stabilities could deteriorate even more severely. , Therefore, it is highly desired to clarify the interaction mechanism between the top AlO x GI and the bottom a-IGZO channel, in order to direct the suppression of defect generation during the ALD process and thus enable the high performance and reliability of ultrathin-EOT SATG AOS TFTs.…”