Total-Ionizing-Dose Irradiation-Induced Dielectric Field Enhancement for High-Voltage SOI LDMOS

Improved Model on Buried-Oxide Damage Induced by Total-Ionizing-Dose Effect for HV SOI LDMOS

“…In our previous work [20], [21], uniform positive fixed charges are set in the SOI/BOX interface to analyze TID effect on HV SOI LDMOS. However, N ot distribution is supposed to be determined more strictly.…”

Channel Length Optimization for Planar LDMOS Field-Effect Transistors for Low-Voltage Power Applications

“…However, complex device structures are often introduced in these proposed technologies which make the industrial fabrication process very difficult and costly. Furthermore, even though device miniaturization is crucial for all voltage ranges, in the past few decades, most studies have been done on large LDMOS devices for mid-voltage and high-voltage applications [15][16][17][18][19][20][21][22][23][24][25][26][27]. And unfortunately, a thorough study on scaling of the planar LDMOS technology, limited to a straightforward planar device design, has not yet been performed.…”