2015
DOI: 10.15866/iremos.v8i1.4884
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Towards 3D Integration of Monolithic X or Γ Ray Detectors Under Possible Electromagnetic Perturbations or Malfunctions

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Cited by 2 publications
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“…For the two 3D detector structures: The VFD of the structure is about 1.5 V. The capacitance has its minimum value at voltage V k ≥ 3 V. Hence, the 3D‐detectors can be biased with the same low voltage level of the CMOS readout circuitry (based on the standard 0.35 µm BiCMOS technology which is STMicroelectronics technology like) [11], and can be stacked integrated with the low voltage readout circuit [12].…”
Section: Small Signal Simulation Resultsmentioning
confidence: 99%
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“…For the two 3D detector structures: The VFD of the structure is about 1.5 V. The capacitance has its minimum value at voltage V k ≥ 3 V. Hence, the 3D‐detectors can be biased with the same low voltage level of the CMOS readout circuitry (based on the standard 0.35 µm BiCMOS technology which is STMicroelectronics technology like) [11], and can be stacked integrated with the low voltage readout circuit [12].…”
Section: Small Signal Simulation Resultsmentioning
confidence: 99%
“…Hence, the 3D-detectors can be biased with the same low voltage level of the CMOS readout circuitry (based on the standard 0.35 µm BiCMOS technology which is STMicroelectronics technology like) [11], and can be stacked integrated with the low voltage readout circuit [12].…”
Section: Fig 1 C-v Characteristics Of Detector Structuresmentioning
confidence: 99%