Towards a Quaternion Complex Logarithmic Number System

Arnold, Mark G.; Cowles, John; Paliouras, V.; Kouretas, Ioannis

doi:10.1109/arith.2011.14

Cited by 5 publications

(1 citation statement)

References 25 publications

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“…More recently, advances in FPGA [13] and cotransformation [17] implementations of SLNS allow higher-precision applications to be affordable. Logarithmic arithmetic has generalizations in the complex numbers [4] and quaternions [5].…”

Section: Inriamentioning

confidence: 99%

Options for Denormal Representation in Logarithmic Arithmetic

Arnold¹,

Collange

2014

J Sign Process Syst

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International audienceEconomical hardware often uses a FiXed-point Number System (FXNS), whose constant absolute precision is acceptable for many signal-processing algorithms. The almost-constant relative precision of the more expensive Floating-Point (FP) number system simplifies design, for example, by eliminating worries about FXNS overflow because the range of FP is much larger than FXNS for the same wordsize; however, primitive FP introduces another problem: underflow. The Signed Logarithmic Number System (SLNS) offers similar range and precision as FP with much better performance (in terms of power, speed and area) for multiplication, division, powers and roots. This paper proposes three variations of a new number system, respectively called the Denormal LNS (DLNS), Denormal Mitchell LNS (DMLNS) and Denormal Offset Mitchell LNS (DOMLNS), which are all hybrids of the properties of FXNS and SLNS. The inspiration for D(OM)LNS comes from the denormal (aka subnormal) numbers found in IEEE-754 (that provide better, gradual underflow) and the μ-law often used for speech encoding; the novel DLNS circuit here allows arithmetic to be performed directly on such encoded data. The proposed approach allows customizing the range in which gradual underflow occurs. Our first DLNS implementation leverages existing SLNS basic blocks. Synthesis shows the novel circuit primarily consists of traditional SLNS addition and subtraction tables, with additional datapaths that allow the novel arithmetic unit to act on conventional SLNS as well as DLNS and mixed data, for a worst-case area overhead of 26 %. Unlike SLNS, this DLNS implementation is still costly for general (non-constant) multiplication, division and roots. To overcome this difficulty, this paper proposes the other variations called Denormal Mitchell LNS (DMLNS) and Denormal Offset Mitchell LNS (DOMLNS), in which the well-known Mitchell’s method makes the cost of general multiplication, division and roots closer to that of SLNS. Taylor-series computations suggest subnormal values in DMLNS and DOMLNS also behave similarly to those in the IEEE-754 FP standard. Synthesis shows that DMLNS and DOMLNS respectively have average area overheads of 25 % and 17 % compared to an equivalent SLNS 5-operation unit

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Section: Inriamentioning

confidence: 99%

Options for Denormal Representation in Logarithmic Arithmetic

Arnold¹,

Collange

2014

J Sign Process Syst

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Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters

Schaffner

Gautschi

Gürkaynak

et al. 2016

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH)

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The Denormal Logarithmic Number System

Arnold¹,

Collange

2013

2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors

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Abstract-Economical hardware often uses a FiXed-point Number System (FXNS), whose constant absolute precision is acceptable for many signal-processing algorithms. The almostconstant relative precision of the more expensive Floating-Point (FP) number system simplifies design, for example, by eliminating worries about FXNS overflow because the range of FP is much larger than FXNS for the same wordsize; however, primitive FP introduces another problem: underflow. The conventional Signed Logarithmic Number System (SLNS) offers similar range and precision as FP with much better performance (in terms of power, speed and area) for multiplication, division, powers and roots. Moderate-precision addition in SLNS uses table lookup with properties similar to FP (including underflow). This paper proposes a new number system, called the Denormal LNS (DLNS), which is a hybrid of the properties of FXNS and SLNS. The inspiration for DLNS comes from the denormal numbers found in IEEE-754 (that provide better, gradual underflow) and the µ-law often used for speech encoding; the novel DLNS circuit here allows arithmetic to be performed directly on such encoded data. The proposed approach allows customizing the range in which gradual underflow occurs. A wide gradual underflow range acts like FXNS; a narrow one acts like SLNS. Simulation of an FFT application illustrates a moderate gradual underflow decreasing bit-switching activity 15% compared to underflowfree SLNS, at the cost of increasing application error by 30%. DLNS reduces switching activity 5% to 20% more than an abruptly-underflowing SLNS with one-half the error. Synthesis shows the novel circuit primarily consists of traditional SLNS addition and subtraction tables, with additional datapaths that allow the novel ALU to act on conventional SLNS as well as DLNS and mixed data, for a worst-case area overhead of 26%.

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Towards a Quaternion Complex Logarithmic Number System

Cited by 5 publications

References 25 publications

Options for Denormal Representation in Logarithmic Arithmetic

Options for Denormal Representation in Logarithmic Arithmetic

Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters

The Denormal Logarithmic Number System

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