Towards Efficient Task Scheduling on 2D Reconfigurable FPGAs

Abstract

With the rapid development of dynamical partial reconfiguration technology, FPGA (Field Programmable Gate Array) is able to allow independent tasks to be executed concurrently without interfering with each other, which increases its flexibility and performance, but on the other hand leads to multi-task scheduling problem. The task scheduling in this paper is the problem of task sequencing, which adjusts the entering sequence of the incoming tasks with the consideration of the attributes of tasks and the utilization of FPGA. A conditional preemption based task sequencing method is proposed that allows tasks that arrive later to be executed in advance as long as the previous tasks can still be guaranteed to enter the FPGA on time. Simulations show that these methods can effectively decrease the waiting ratio of task sets, thus improving the flexibility and utilization of FPGA.