Towards Equivalence Checking Between TLM and RTL Models

Bombieri, Nicola; Fummi, Franco; Pravadelli, Graziano; Marques-Silva, João

doi:10.1109/memcod.2007.371236

Cited by 31 publications

(12 citation statements)

References 21 publications

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“…S I −→ S M . The abstraction procedure generates an event-based equivalent TLM model of a starting RTL model [16], [17]. This means that ∀ S I ∈ S I ,…”

Section: B Abstraction Of Injected Rtl Models Into Injected Tlm Modelsmentioning

confidence: 99%

“…The methodology relies on the concept of RTL-to-TLM abstraction, which has been applied for reusing existent and pre-verified RTL IPs into TLM designs [16]. The abstraction process converts cycle accurate RTL IPs into event-based equivalent [17] The paper is organized as follows. Section II summarizes the main important steps of the RTL-to-TLM abstraction methodology.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Accelerating RTL Fault Simulation through RTL-to-TLM Abstraction

Bombieri

Fummi

Guarnieri

2011

2011 Sixteenth IEEE European Test Symposium

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Different fault injection techniques based on simulation have been proposed in the past for functional verification of register transfer level (RTL) IP models. They allow designers to model any type of fault and provide the quality of test patterns through the fault coverage estimation. Nevertheless, the low speed of such a cycle-accurate RTL simulation involves a trade-off between the simulation time and the achieved fault coverage.On the other hand, Transaction-level modeling (TLM) allows a simulation speed-up up to 1000x with respect to RTL. This paper presents a methodology to accelerate RTL fault simulation through automatic RTL-to-TLM abstraction. The methodology abstracts injected RTL models into equivalent injected TLM models thus allowing a very fast automatic test pattern generation at TLM level. The paper shows how the generated TLM test patterns can be automatically synthesized into RTL test patterns by exploiting the structural information of the RTL model extracted during the abstraction process. Experimental results have been applied to several designs of different size and complexity to show the methodology effectiveness.

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“…S I −→ S M . The abstraction procedure generates an event-based equivalent TLM model of a starting RTL model [16], [17]. This means that ∀ S I ∈ S I ,…”

Section: B Abstraction Of Injected Rtl Models Into Injected Tlm Modelsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Accelerating RTL Fault Simulation through RTL-to-TLM Abstraction

Bombieri

Fummi

Guarnieri

2011

2011 Sixteenth IEEE European Test Symposium

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“…Bombieri et al presented a method for equivalence checking of TLM and RTL models [6]. To this end their approach ignores the state trajectories of the two models and uses them as black boxes which have to produce the same sequence of output events if fed with the same sequence of input events.…”

Section: Related Workmentioning

confidence: 99%

State chart refinement validation from approximately timed to cycle callable models

Findenig

Ecker

2010

2010 International Symposium on System on Chip

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Most of today's designs use a top-down design flow in which hardware is first implemented at transaction level and, as soon as it's functionality is verified, refined to a register transfer model which is conceptually a cycle true and cycle callable model. Traditionally, both the refinement and its validation are done by hand. We propose a design pattern for both the transaction-level and the cycle callable model that eases both steps: the refinement process is made more intuitive and verifying the cycle callable model is greatly simplified by automatically synchronizing the transaction-level model with the refined model.

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“…The functional errors of high-level specifications may result in inevitable malfunctions in low-level implementations. Therefore, it is a major challenge to guarantee the correctness of different abstractions [2,3]. Validating each abstraction is necessary but time-consuming because it requires the profound understanding of the design.…”

Section: Introductionmentioning

confidence: 99%