Tradeoff Between Hot Carrier and Negative Bias Temperature Degradations in High-Performance $\hbox{Si}_{1 - x}\hbox{Ge}_{x}$ pMOSFETs With High-$k$/Metal Gate Stacks

Choi, Won‐Ho; Kang, Chang-Young; Oh, Jungwoo; Lee, Byoung-Hun; Majhi, P.; Kwon, Hyuk-Min; Jammy, R.; Lee, Ga‐Won; Lee, Hi‐Deok

doi:10.1109/led.2010.2071851

Cited by 2 publications

(2 citation statements)

References 21 publications

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“…Furthermore, less drain current degradations were observed for SiGe transistors. By introduction of strained SiGe layer in pMOSFETs, the holes are primarily located in the SiGe channel due to valence band offset [19,20] and thus the holes concentration in Si surface channel is lower than that of control Si pMOSFET. Since NBTI is mainly caused by holes, the SiGe pMOSFETs with lower carrier concentration can improve NBTI effect.…”

Section: Sige Pfet Device Performance and Nbti Reliabilitymentioning

confidence: 99%

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances

Yuan

Yeh

Chen

et al. 2011

Microelectronics Reliability

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Section: Sige Pfet Device Performance and Nbti Reliabilitymentioning

confidence: 99%

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances

Yuan

Yeh

Chen

et al. 2011

Microelectronics Reliability

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“…[6][7][8][9][10] Negativebias temperature instability (NBTI) is considered to be a major reliability issue for scaled CMOS technologies due to the increased oxide electric field (E ox ) caused by scaled electrical oxide thickness (EOT). Many investigations on the NBTI of SiGe pMOSFETs have focused on degradation characteristics, [11][12][13][14] but under real operating conditions, the devices would be subjected to repeated stress and recovery phases. Thus, the in-depth analysis of the recovery characteristics of SiGe pMOSFETs could provide an accurate and deeper understanding of their NBTI reliability.…”

Section: Introductionmentioning

confidence: 99%

Improved Degradation and Recovery Characteristics of SiGe p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors under Negative-Bias Temperature Stress

Choi

Sohn

Sagong

et al. 2013

Jpn. J. Appl. Phys.

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This paper describes the degradation and recovery characteristics of SiGe pMOSFETs with a high-k/metal gate stack under negative-bias temperature instability (NBTI) stress. The threshold voltage instability (ΔV th) of SiGe pMOSFETs shows an increased percentage of recovery (R) as well as lower degradation than those of control Si pMOSFETs. It is found that the recovery characteristics of SiGe and Si pMOSFETs have similar dependencies on various stress conditions, and the increased R of SiGe pMOSFETs is mainly attributed to their lower degradation characteristic. Under real operating conditions, most of the ΔV th caused by hole trapping would be rapidly recovered through a fast recovery process, and newly-generated interface traps during the stress would determine the degradation level of V th. The SiGe pMOSFETs show lower stress-induced interface traps; thus, they would display more reliable NBTI characteristics than Si pMOSFETs under real operating conditions.

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Tradeoff Between Hot Carrier and Negative Bias Temperature Degradations in High-Performance $\hbox{Si}_{1 - x}\hbox{Ge}_{x}$ pMOSFETs With High-$k$/Metal Gate Stacks

Cited by 2 publications

References 21 publications

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances

NBTI reliability on high-k metal-gate SiGe transistor and circuit performances

Improved Degradation and Recovery Characteristics of SiGe p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors under Negative-Bias Temperature Stress

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