Traffic-aware performance optimization in Real-time wireless network on chip

Baharloo, Mohammad; Khonsari, Ahmad; Dolati, Mahdi; Shiri, Pouya; Ebrahimi, Masoumeh; Rahmati, Dara

doi:10.1016/j.nancom.2020.100321

Cited by 5 publications

(2 citation statements)

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“…e designed method minimizes the network latency, but the higher throughput was not achieved. A deterministic and scalable arbitration mechanism was introduced in [5] to minimize the average latency. But the higher network throughput was not achieved.…”

Section: Related Workmentioning

confidence: 99%

Multicriteria Deming Regressive African Buffalo Optimized Mapping for 3D NoC Architecture Design

Sushma

Alagarsamy

Lakshminarayanan

et al. 2022

Mathematical Problems in Engineering

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Purpose. Networks-on-Chip (NoC) is a network-based communication between operating cores and intellectual property (IP) cores integrated on the same chip. An efficient design of NoC ensures high-speed data transfer and minimum essential connections in large-scale multicore, low power applications. Design/methodology/approach. A unique technique called Multicriteria Deming Regressive African Buffalo Optimized Mapping Weighted Directive Graph Theory (MDRABOMWDGT) is introduced for an efficient Network-on-Chip architecture design. The main aim of the proposed technique is to find efficient operating cores integrated on the chip with minimum time. Initially, a set of IP cores are listed with their connections from the benchmark dataset. Then Multicriteria Deming Regressive African Buffalo Optimization is applied to the topology for mapping strategy on 3D NoC, with communication metrics such as throughput, latency, and computation time. The optimization technique initializes the population of cores in search space. For each core in the network, communication metrics are measured; then Deming regression is applied to analyze multicriteria functions for minimizing computation time. Further, fitness is measured to get an optimal IP core for improving the performance of mapping in 3D NoC. Findings. Comprehensive experimental evaluation is conducted using a benchmark dataset, communication metrics are measured, and results show significant improvement in performance with respect to energy parameters compared to state-of-the-art works. Originality/value. The mapping strategy for 3D NOC is developed and the results are compared with the state-of-the-art techniques.

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Section: Related Workmentioning

confidence: 99%

Multicriteria Deming Regressive African Buffalo Optimized Mapping for 3D NoC Architecture Design

Sushma

Alagarsamy

Lakshminarayanan

et al. 2022

Mathematical Problems in Engineering

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“…This runtime monitoring can be focused on specific key regions or distributed across the NoC. Traffic awareness allows the innovation and implementation of techniques applied in different communication processes, such as arbitration mechanisms that improve network latency [95] or routing algorithms that increase throughput [189]. • Congestion-aware: The congestion of the communication infrastructure of an MPSoC depends on several factors, which, in the case of NoCs, is closely related to the amount and type of traffic, latency, and network throughput.…”

mentioning

confidence: 99%

A Survey of MPSoC Management toward Self-Awareness

Gonzalez-Martinez,

Sandoval-Arechiga,

Solis-Sanchez

et al. 2024

Micromachines

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Managing Multi-Processor Systems-on-Chip (MPSoCs) is becoming increasingly complex as demands for advanced capabilities rise. This complexity is due to the involvement of more processing elements and resources, leading to a higher degree of heterogeneity throughout the system. Over time, management schemes have evolved from simple to autonomous systems with continuous control and monitoring of various parameters such as power distribution, thermal events, fault tolerance, and system security. Autonomous management integrates self-awareness into the system, making it aware of its environment, behavior, and objectives. Self-Aware Cyber-Physical Systems-on-Chip (SA-CPSoCs) have emerged as a concept to achieve highly autonomous management. Communication infrastructure is also vital to SoCs, and Software-Defined Networks-on-Chip (SDNoCs) can serve as a base structure for self-aware systems-on-chip. This paper presents a survey of the evolution of MPSoC management over the last two decades, categorizing research works according to their objectives and improvements. It also discusses the characteristics and properties of SA-CPSoCs and explains why SDNoCs are crucial for these systems.

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