We report on DC and microwave electrical transport measurements in silicon-on-insulator CMOS nano-transistors at low and room temperature. At low source-drain voltage, the DC current and RF response show signs of conductance quantization. We attribute this to Coulomb blockade resulting from barriers formed at the spacer-gate interfaces. We show that at high bias transport occurs thermionically over the highest barrier: Transconductance traces obtained from microwave scattering-parameter measurements at liquid helium and room temperature is accurately fitted by a thermionic model. From the fits we deduce the ratio of gate capacitance and quantum capacitance, as well as the electron temperature.Recent CMOS technology allows for the fabrication of silicon-on-insulator structures of nano-metric size. Depending on fabrication strategy, charge transport in these devices can be quasi-zero-or one-dimensional:Field-effect devices based on narrow silicon channels with spacer regions surrounding the gate can exhibit single-electron-transistor * Electronic address: ab2106@cam.ac.uk (SET) characteristics [1][2][3], whereas gate-allarround nanowires formed in Si fins show 1D behavior, e.g. conductance quantization due to subband formation [4][5][6]. Silicon nanowires on silicon-on-insulator (SOI) substrates have recently been shown to be promising candidates for future low-power and radio frequency (RF) applications [6][7][8][9].