Transient Tap Couplers for Wafer-Level Photonic Testing Based on Optical Phase Change Materials

Abstract

Wafer-level testing is crucial for process monitoring, post-fabrication trimming, and understanding system dynamics in photonic integrated circuits (PICs). Waveguide tap couplers are usually used to provide testing access to the PIC components. These tap couplers however incur permanent parasitic losses, imposing a trade-off between PIC performance and testing demands. Here we demonstrate a transient tap coupler design based on optical phase change materials (O-PCMs). In their asfabricated "on" state, the couplers enable broadband interrogation of PICs at the wafer level. Upon completion of testing, the tap couplers can be turned "off" with minimal residual loss (0.01 dB) via a simple low-temperature (280 °C) wafer-scale annealing process. We further successfully demonstrated transient couplers in both Si and SiN photonics platforms. The platform-agnostic transient coupler concept uniquely combines compact footprint, broadband operation, exceptionally low residual losses, and low thermal budget commensurate with post-fabrication treatment, thereby offering a facile solution to wafer-level photonic testing without compromising the final PIC performance.

Reconfigurable fiber-to-waveguide coupling module enabled by phase-change material incorporated switchable directional couplers

“…The proposed module renders selective switching between the GAC and SSC input/outputs by leveraging the nonvolatile switching ability of the GSST-based directional coupler. Considering the state of GSST can be switched back and forth from amorphous to crystalline via low-temperature annealing under specific environmental conditions, 19 the inputs and outputs can be switched back and forth from the GAC to the SSC and vice versa, not involving continuous power during the operation of the circuit. This flexibility in choice of the input and output coupler enables not only full-scale wafer-level testing via the GAC but also low-loss and broadband applications at the chip level when the chips are diced out of the wafer.…”

“…This SDC switching permits the input and output from either the GAC or SSC to be activated and deactivated. In this work, Ge 2 Sb 2 Se 4 Te 1 (GSST) was chosen as the PCM candidate owing to its lower optical loss in both the amorphous and crystalline states compared to other PCMs 15 , 19 . At a wavelength (λ) of 1550 nm, the amorphous state of GSST (aGSST) exhibits a refractive index of 3.3258 in conjunction with a small extinction coefficient of 1.8 × 10 −4 while its crystalline state (cGSST) manifests a higher refractive index and extinction coefficient of 5.083 and 0.35, respectively 21 .…”

“…For the proposed RFWC module, a straight waveguide was considered as the photonic circuit under investigation, which may be replaced by other photonic circuits in future applications. Both the SDCs exploits a thin layer of PCM, whose state can be altered from amorphous to crystalline and vice versa by virtue of low-temperature annealing in the vicinity of 280 °C 15 , 19 . The SDC is activated when the PCM is amorphous and deactivated when it is crystalline.…”

“…A pair of PCM-incorporated SDCs is deployed to route the light from these two disparate couplers into and out of the chip. The state of the PCM can be switched between amorphous and crystalline states and vice versa, by applying heat or high-energy light pulses to the chip at a specific temperature under a specific environment 6 , 15 , 19 , 20 . This invokes nonvolatile switching when used with directional couplers.…”

“…The adoption of PCMs makes it possible to simultaneously integrate GAC and SSC into a single circuit, thereby rendering both wafer-level and chip-level coupling of light. A study reported by Y. Zhang group demonstrated a transient tap coupler capable of tapping a small portion of light from a waveguide, which could be disabled by adjusting the state of the PCM, for probable applications in wafer-level testing 19 . However, it is limited to tapping only a small portion of light, not facilitating full-scale wafer level testing of circuits.…”