Transimpedance receiver design optimization for smart pixel arrays

Abstract

Optical transimpedance receivers implemented in CMOS VLSI technologies are modeled and optimized for freespace optoelectronic interconnections. Sensitivity, bandwidth, power dissipation, and circuit area are analyzed for receivers using three different submicron CMOS processes. A comparison with the circuit noise limited optical power indicates that, for digital computing applications, the receiver sensitivity is limited by the gain-bandwidth product of the receiver amplifiers and the necessary noise margin of logic circuits.

TIA optimization for optical network receivers for multi-core systems-in-package

“…The PP topology reaching this bit rate uses R F = 1.5 kΩ, W N = 1.635 µm and consumes 0.24 pJ/bit. 18 Gb/s is derived from the system bandwidth of 14 GHz and a bandwidth to bit rate factor of around 1.25 [5] which accounts for the fact that some bandwidth can be sacrificed before inter symbol interference (ISI) will take effect. Nevertheless, higher bit rates can be achieved when Decision Feedback Equilibration (DFE) is used.…”

“…In [5] and [1] analytical optimizations of TIAs and/or entire optical links are presented. In order to show the problems with analytical optimization, we used a common source topology and computed its bandwidth based on a complete small signal model of the circuit (a π model was assumed for the transistors).…”

Rationale and challenges for optical interconnects to electronic chips

“…Receiver power dissipation may well turn out to be the largest power dissipation in optical interconnects [analyses (see, e.g., [21] and [25]) vary in their conclusions here, depending on the specific assumptions made about optoelectronic devices, though receiver and transmitter dissipations are expected by most authors to be roughly of comparable magnitude].…”

“…Since that time, a body of work (see, for example, [4] and [6]- [33]) has addressed potential benefits and limits of optics for interconnection [4], [7], [8], [12], [14]- [16], [20], [23], [24], [28], analysis of the relative benefits of optics versus electronics [4], [6], [9]- [11], [13], [21], [22], [26], [27], [30], [31], [33], and comparison of different kinds of optical approaches against one another [17]- [19], [25], [29]. Several of these papers review parts of this work (e.g., [20], [22], [27], and [28]).…”

Power Efficiency Comparisons of Interchip Optical Interconnect Architectures

“…This brief uses current state-of-the-art and reasonable projected optical device parameters and leverages previous optimization methods for optical receiver design [10] and overall link design [11]- [13]. In addition, an optimal current density methodology with normalized transistor parameters extracted from circuit simulations is applied to jointly optimize driver and receiver circuitry to minimize the total link power dissipation.…”