Translation Validation of Loop Invariant Code Optimizations Involving False Computations

Chouksey, Ramanuj; Karfa, Chandan; Bhaduri, Purandar

doi:10.1007/978-981-10-7470-7_72

Cited by 8 publications

(5 citation statements)

References 16 publications

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“…It implies that either the cTraces are equivalent or the computations corresponding to these cTraces are false computations. As mentioned in [23], these benchmarks have some false computations; therefore, Z3 reports unsat and we are correctly able to identify the false-negative case of the VP method. The paper [23] proposed an enhanced VP-based equivalence checking method to overcome this limitation of the VP method.…”

Section: Resultsmentioning

confidence: 71%

“…The benchmarks tabulated in rows 8–12 of Table 2 are taken from [23]. The VP method fails to establish the equivalence for these benchmarks, i.e.…”

Section: Resultsmentioning

confidence: 99%

“…This section briefly explains the FSMD model and the VP method [7]. The contents of this section were taken from our previous works [7,23,24]. An FSMD is defined as 7-tuple Here, S is a set of relations over arithmetic expressions and Boolean literals and U represents a set of storage variables and output assignment statements.…”

Section: Fsmd Model and Path-based Equivalence Checkingmentioning

confidence: 99%

“…This section briefly explains the FSMD model and the VP method [7]. The contents of this section were taken from our previous works [7, 23, 24]. An FSMD is defined as 7‐tuple

falsefalse⟨ Q, q_{0}, I, V, O, f, h falsefalse⟩

, where Q is the finite set of states;

q_{0} \in Q

is the reset (initial) state; I is the finite set of inputs; V is the finite set of storage variables; O is the set of outputs;

f : Q \times 2^{normalS} false\to Q

is the state transition function; and

h : Q \times 2^{normalS} false\to U

is the update function of the output and the storage variables. …”

Section: Fsmd Model and Path‐based Equivalence Checkingmentioning

confidence: 99%

“…If the SMT solver does not produce any counter‐example and the equivalence result is false‐negative, then either the part of the programmes represented by the cTraces are actually equivalent or all the possible computations of the programme represented by both cTraces are false computations. The paper [23] shows that the VP method gives a false‐negative result if a benchmark has a false computation. If a computation of an FSMD never executes for all possible inputs, then it is called a false computation .…”

Section: Counter‐example Generationmentioning

confidence: 99%

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Counter‐example generation procedure for path‐based equivalence checkers

et al. 2019

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Path-based equivalence checkers (PBECs) have been successfully applied for verification of programmes from diverse domains and from various stages of high-level synthesis. In the case of non-equivalence, PBEC provides very little information which is not sufficient for further investigation of the two programmes being compared by some human expert. In this work, the authors show how a counter-trace (cTrace) can be generated in the case of non-equivalence reported by the PBEC. Using this cTrace, they also present a procedure to find suitable initialisation values for input variables which reveal the non-equivalence (i.e. counterexample) by using off-the-shelf satisfiability modulo theories (SMT) solvers. To aid the human expert, they also show that how they can visualise this cTrace in the control and data-flow graph of the programmes using the graph visualisation software-Graphviz. This counterexample and visual representation of the corresponding cTrace will be helpful in debugging the root cause of the non-equivalence. The experimental results are encouraging.

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Section: Resultsmentioning

confidence: 71%

“…The benchmarks tabulated in rows 8–12 of Table 2 are taken from [23]. The VP method fails to establish the equivalence for these benchmarks, i.e.…”

Section: Resultsmentioning

confidence: 99%

Section: Fsmd Model and Path-based Equivalence Checkingmentioning

confidence: 99%

“…This section briefly explains the FSMD model and the VP method [7]. The contents of this section were taken from our previous works [7, 23, 24]. An FSMD is defined as 7‐tuple