Trench IGBT with stepped doped collector for low energy loss

Vaidya, Mahesh; Naugarhiya, Alok; Verma, Shrish

doi:10.1088/1361-6641/ab6106

Cited by 11 publications

(6 citation statements)

References 17 publications

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“…However, the proposed structure provides a more effective conduction path for the leakage of carriers. From the previous work on the improving of collector region, Si IGBT can demonstrate much lower Eoff as shown in Table II [37,38]. We can also see that, the 12 kV proposed CTH-IGBT can represent a comparative Eoff performance compared with the 5.5 kV SiC SJ-IGBT [39].…”

mentioning

confidence: 67%

Low Turn-Off Loss 4H-SiC Insulated Gate Bipolar Transistor With a Trench Heterojunction Collector

Wang

Mao

et al. 2020

IEEE J. Electron Devices Soc.

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In this work, an improved 4H-SiC insulated gate bipolar transistor (IGBT), or CTH-IGBT, with a trench p-polySi/p-SiC heterojunction on the backside of the device is proposed to reduce the turn-off energy loss (Eoff) and turn-off time (Toff). The electrical properties of the proposed and contrast structures are all simulated using the ATLAS simulation software to research the working mechanism of this improved structure. For the static performance, the specific ON-resistance (Ron,sp) and the figure of merit (FOM = VBR 2 / Ron,sp) are not influenced much as compared to the traditional structure at the same breakdown voltage (VBR) of 12 kV. However, with a prominent electron current path formed by the heterojunction region of CTH-IGBT, a very available conduction path to discharge the electrons during turn-off process is proved in this paper. The simulation results demonstrate that compared with the traditional structure, the turn-off energy loss of the CTH-IGBT is reduced by 76.4%, while the turn-off time is reduced by 85.0%. Index Terms-4H-SiC, heterojunction, Insulated Gate Bipolar Transistor (IGBT), turn-off loss, turn-off time, breakdown voltage. I. INTRODUCTION he performance of silicon-based devices is gradually approaching its limits, and it has become increasingly difficult to meet the application requirements of modern power electronic systems. The third-generation semiconductor material silicon carbide (SiC) has gradually replaced the use of silicon (Si) in power applications due to its wide band gap, high breakdown electric field, high thermal conductivity, high electron saturation drift speed and higher radiation resistance. It is widely used to make high-power devices for application in high temperature, high voltage, high frequency and radiation resistant operating environments and requirements [1-6].

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confidence: 67%

Low Turn-Off Loss 4H-SiC Insulated Gate Bipolar Transistor With a Trench Heterojunction Collector

Wang

Mao

et al. 2020

IEEE J. Electron Devices Soc.

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“…In order to have a good comparison with recently reported IGBT results, the V ceon -E off trade-off relationship for the DIE-PIGBT. Pro with W p = 4 µm, alternated trench-gate IGBT (AT-IGBT) in [16] and stepped doped collector (SDC-IGBT) in [6] with device thickness of 400 µm are also compared. It can be seen that the proposed device shows best performance among these structures.…”

Section: Resultsmentioning

confidence: 99%

“…Combining advantages of the bipolar junction transistor and metal-oxide-semiconductor field effect transistor (MOSFET), IGBT demonstrates excellent device performance in both static and dynamic states [1][2][3]. In the last few decades, improved IGBT structures with various leading-edge technologies, such as field stop (FS) [4][5][6], floating-P (FP) [7,8], split gate [9,10], dual gate [11], etc have been proposed and put into market. Although better device performance can be achieved for the trench gate IGBT with reduced junction field effect transistor (JFET) effect, the planar gate IGBT (PIGBT) is still preferred in the high voltage applications since it has lower switching loss, lower saturated collector current density (J sat ) and higher reliability.…”

Section: Introductionmentioning

confidence: 99%

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

Zhang¹,

Huang²,

Liu³

et al. 2022

Semicond. Sci. Technol.

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A novel dual injection enhanced planar gate IGBT with self-adaptive hole path (DIE-PIGBT) is proposed. A floating-P region is applied behind the emitter-connected deep trench in z direction and contacted with the N-type carrier stored (N-CS) layer for the proposed IGBT. Compared to the conventional trench shielded planar gate IGBT (CTS-PIGBT), the proposed device further alleviates the negative impact of the N-CS layer on the breakdown voltage (BV) and reduces both the on-state voltage drop (Vceon) and saturated collector current density (Jsat). Simulation results show that with the same device thickness of 400μm, the BV are 4625V and 4275V for the proposed and conventional device, respectively. The Vceon at 75A/cm2 is 2.51V for the proposed DIE-PIGBT, which is 1.13V lower than that of the CTS-PIGBT. Furthermore, with similar BV to the conventional one, the device thickness can be reduced to 355μm for the DIE-PIGBT. Pro. The total gate charge (QG) and miller plateau charge (QGC) for the proposed device are reduced by 61.0% and 89.9%, respectively. As a result, the proposed structure has better trade-off relationship between the Vceon and turn-off loss (Eoff). At the same Vceon of 2.51V, the Eoff for the DIE-PIGBT and DIE-PIGBT. Pro are 45.17mJ/cm2 and 41.01 mJ/cm2, which is reduced by 44.0% and 49.1% when compared to 80.61mJ/cm2 of the CTS-PIGBT, respectively. Moreover, the Jsat is reduced from 619A/cm2 for the CTS-PIGBT to 368A/cm2 for the DIE-PIGBT under the Vge of 15V. The short-circuit withstand time of the DIE-PIGBT is 1.9 times larger than that of the conventional device.

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“…These dimensions have been referred from the article. 19 In Fig. 1b, the arrangement of p-poly and n-poly is selected such that n-poly is sandwiched between the two p-poly layers.…”

Section: Device Description and Physicsmentioning

confidence: 99%

1.2 kV Stepped Oxide Trench Insulated Gate Bipolar Transistor with Low Loss for Fast Switching Application

Vaidya¹,

Naugarhiya²,

Verma³

et al. 2022

ECS J. Solid State Sci. Technol.

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A gate engineering technique was used in an insulated gate bipolar transistor (IGBT) for fast switching applications. The modification consists of stepped oxide pattern at gate terminal with n-poly layer sandwiched between two p-poly layers. The oxide thickness increases from top to bottom to create a stepped structure. The oxide is thinner on the channel side and thicker on the collector side. The thinner oxide on the channel side increases gate to emitter charges (QGE) by extracting extra charges along the channel. The presence of these extra charges also increases the collector current density resulting in a reduction in the area specific on-resistance (Ron.A). Furthermore, to elongate the impact of QGC reduction, the low doped p-col region has been facilitated which also play an important role to increase the breakdown voltage by reducing corner electric field. This p-col region creates a charge extraction path to sweep out charges from the drift region during a turn-off event, leading to rapid turn-off. The collective improvement in QGE and QGC provides fast switching to the proposed device by improving turn-off time by 63% and reduces turn-off loss (Eoff) by 55% as compared to the conventional device

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Trench IGBT with stepped doped collector for low energy loss

Cited by 11 publications

References 17 publications

Low Turn-Off Loss 4H-SiC Insulated Gate Bipolar Transistor With a Trench Heterojunction Collector

Low Turn-Off Loss 4H-SiC Insulated Gate Bipolar Transistor With a Trench Heterojunction Collector

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

1.2 kV Stepped Oxide Trench Insulated Gate Bipolar Transistor with Low Loss for Fast Switching Application

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