Tri-State Logic Using Vertically Integrated Si–SiGe Resonant Interband Tunneling Diodes With Double NDR

Jin, Niu; Chung, Sung-Yong; Heyns, R.M.; Berger, Paul R.; Yu, Rui; Thompson, Phillip E.; Rommel, S.L.

doi:10.1109/led.2004.833845

Cited by 59 publications

(39 citation statements)

References 12 publications

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“…On the other hand wiring of binary logics to build multivalued system is a difficult task. 19 The other choice is to increase the radix number. Information density also increases with increasing radix number.…”

Section: Introductionmentioning

confidence: 99%

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A single fluorophore to address multiple logic gates

Sahu

Sil

Das

et al. 2015

Analyst

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Logic gates with different radixes have been constructed using a biologically active molecule, 2-(4'-N,N-dimethylaminophenyl)imidazo[4,5-b]pyridine (DMAPIP-b). Taking advantage of the multiple binding sites of the fluorophore, a series of different molecular logic gates are developed using fluorescence intensities at different wavelengths. The high emission of the molecule is drastically quenched in the presence of Fe(3+). It is regained by the addition of an equivalent amount of F(-). The fluorescence On-Off nature has been used to construct molecular full subtractor and molecular keypad lock system with Boolean logic. A ternary system is generated by considering three defined fluorescence intensities at particular wavelengths. The smooth dependency of emission intensities with analyte concentration is utilized to construct an infinite-valued fuzzy logic system. The fuzzy logic system is further coupled with a neuro-adaptation method to predict more accurately the dependency of molecular intensity on external inputs.

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Section: Introductionmentioning

confidence: 99%

“…18 If c m /c s is very high and c a /c s is medium then I/I 0 is very low. 19 If c m /c s is very high and c a /c s is high then I/I 0 is very low. 20…”

mentioning

confidence: 99%

A single fluorophore to address multiple logic gates

Sahu

Sil

Das

et al. 2015

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“…The voltage to be stored is provided by enabling the V S as a pulse signal [4]. We require a positive triggering pulse to transfer the logic state from the first initial operating point to the second stable operating point.…”

Section: Multiple-valued Logic Designmentioning

confidence: 99%

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Gan

Liang

Chen

2010

IEICE Trans. Inf. & Syst.

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SUMMARYThe paper demonstrates a novel multiple-valued logic (MVL) design using a three-peak negative differential resistance (NDR) circuit, which is made of several Si-based metal-oxide-semiconductor fieldeffect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) devices. Specifically, this three-peak NDR circuit is biased by two switch-controlled current sources. Compared to the traditional MVL circuit made of resonant tunneling diode (RTD), this multiple-peak MOS-HBT-NDR circuit has two major advantages. One is that the fabrication of this circuit can be fully implemented by the standard BiCMOS process without the need for molecular-beam epitaxy system. Another is that we can obtain more logic states than the RTD-based MVL design. In measuring, we can obtain eight logic states at the output according to a sequent control of two current sources on and off in order.

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“…The negative differential resistance (NDR) devices and circuits have been widely studied in many applications including the logic circuit [1][2][3], memory circuit [4][5][6][7], oscillator [8], analog-to-digital converter [9], frequency divider [10,11], flip-flop circuit [12,13], delta sigma modulator [14], and cellular neural network [15]. Especially the multiple-peak NDR circuit is a suitable element to apply to the multiple-valued memory (MVM).…”

Section: Introductionmentioning

confidence: 99%

Novel multiple-selected and multiple-valued memory design using negative differential resistance circuits suitable for standard SiGe-based BiCMOS process

Gan

Tsai

Liang

2008

Analog Integr Circ Sig Process

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A novel multiple-selected and multiple-valued memory (MSMVM) design using the negative differential resistance (NDR) circuits is demonstrated. The NDR circuits are made of Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT). During suitably designing the parameters and connecting three MOS-HBT-NDR circuits, we can obtain the three-peak current-voltage (I-V) curves with different peak currents in the combined I-V characteristics. For the traditional resonant-tunneling-diode (RTD) memory circuit, one can only obtain four-valued memory states using a constant current source to bias the three-peak NDR circuit. However in this paper, we utilize two switch-controlled current sources to bias the threepeak NDR circuit at different current levels. By controlling the switches on and off alternatively, we can obtain the four-valued, three-valued, two-valued, and one-valued memory levels under the four different conditions. Our design is based on the standard 0.35 lm SiGe BiCMOS process.

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Tri-State Logic Using Vertically Integrated Si–SiGe Resonant Interband Tunneling Diodes With Double NDR

Cited by 59 publications

References 12 publications

A single fluorophore to address multiple logic gates

A single fluorophore to address multiple logic gates

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Novel multiple-selected and multiple-valued memory design using negative differential resistance circuits suitable for standard SiGe-based BiCMOS process

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