True non-intrusive sensors for RF built-in test

Abdallah, L.; Stratigopoulos, Haralampos-G.; Mir, Salvador

doi:10.1109/test.2013.6651885

Cited by 8 publications

(4 citation statements)

References 23 publications

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“…The efficiency of the indirect test strategy for production testing has been widely studied in the literature, including various aspects such as the choice of the regression model type, the selection of relevant indirect measurements, the use of embedded sensors, the adoption of an adaptive test flow... A comprehensive review of these works can be found in [5]. Some studies have also investigated the use of the indirect test strategy to implement Built-In Self-Test (BIST) [6,7] or to perform postmanufacturing calibration [8.9] of analog/RF circuits. However, to the best of our knowledge, the use of the indirect test strategy has never been investigated to implement on-line RF performance monitoring.…”

Section: Introductionmentioning

confidence: 99%

Exploring on-line RF performance monitoring based on the indirect test strategy

Badawi

Azaïs

Bernard

et al. 2021

2021 IEEE 22nd Latin American Test Symposium (LATS)

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This paper deals with the general domain of IC reliability and targets more specifically RF circuit. It investigates the feasibility of implementing on-line RF performance monitoring based on the indirect test strategy. The principle of the proposed solution is introduced and the essential requirements needed to adapt the indirect test strategy are discussed. The proposed solution is then applied to a wireless microcontroller with the objective to monitor the power level delivered by the RF transmitter. Hardware measurement results are presented, which demonstrate the potential of this approach and establish a proofof-concept.

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Section: Introductionmentioning

confidence: 99%

Exploring on-line RF performance monitoring based on the indirect test strategy

Badawi

Azaïs

Bernard

et al. 2021

2021 IEEE 22nd Latin American Test Symposium (LATS)

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“…This source can be used to measure the absolute power output of an RF circuit provided that is a tuned circuit. In [23], the authors propose to use thermal detectors that require no contact, and hence introduce no performance overhead, to correlate the thermal measurements with the gain of the DUT. This technique works very well when the DUT output is high enough to generate a thermal gradient.…”

Section: Introductionmentioning

confidence: 99%

Process independent gain measurement with low overhead via BIST/DUT co-design

Jeong

Kitchen

Ozev

2016

2016 IEEE 34th VLSI Test Symposium (VTS)

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Built-in Self-Test (BIST) is essential, particularly for radio frequency (RF) devices where off-chip RF signal analysis is costly or in some cases, infeasible. Two major problems have made RF BIST elusive. First, process variations make the BIST circuit behavior hard to predict, limiting accuracy of measurements. Second, the overhead, particularly in terms of performance degradation, make RF BIST undesirable. In this paper, we address these two issues for RF BIST gain measurement. First, we show that by setting up relative gain measurements and carefully crafting the BIST methodology and the matching BIST circuit, the effect of process variations on measurement accuracy can be suppressed. Second, by codesigning the BIST circuit together with the device under test (DUT), performance impact can be eliminated or significantly reduced. To demonstrate the proposed approach, we design a low noise amplifier (LNA) as the DUT together with the BIST circuit. We also design a stand-alone LNA with the same specifications and manufacture these two circuits on the same die. We show that the LNA gain can be determined very accurately, using only DC measurements, and the performance impact of the BIST circuit is negligible.

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“…Similarly, Abdallah presents a non intrusive sensor for extracting DC signatures from RF circuits in [19]. The used test vehicle is a low noise amplifier (LNA) whose functional specifications are modeled using a MARS regressor based on the aforementioned low cost DC measurements.…”

Section: Non Linear Regression: Mars Regressionmentioning

confidence: 99%

“…19 describes the algorithm which allows the densification of the test decision boundary based on an initial data set of N 0 Monte Carlo simulations. Then, the circuits are simulated and their functional specifications are obtained identifying the circuits lying near the boundary and used as a reference for selecting N extra circuits from a new and much larger N 1 samples data set.…”

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confidence: 99%

Mixed-signal alternate test and binning using digitally encoded signatures

Gómez Pau

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Integrated circuit industry has always faced the necessity of testing and verifying the fabricated ICs in order to guarantee that no faulty circuits reach the market as well as the fabricated devices function within design specifications throughout their entire service life. In the current frame, the accomplishment of this objective entangles considerable economic implications and great technological challenges. Analog and mixed-signal circuit testing becomes an even more challenging endeavor since no efficient nor systematic procedures are available. Further, these challenges are strongly related to the process variability induced by the constant feature size miniaturization as well as by circuit operating conditions (i.e. PVTA variations). As opposed to the classic or specification based testing, alternate testing techniques have been lately adopted as a promising solution in such challenging scenario. In this thesis, a novel methodology to encode the pass/fail regions in the alternate measurements space is proposed. The method relies on two phases. The training phase digitally encodes the test acceptance/rejection regions in the alternate measurements space using octrees. The testing phase corresponds to the actual production testing using the previously computed octree data structure. Such digital encoding approach presents a number of benefits, specially in terms of computational efficiency since the resulting octree structures are inherently sparse, what yields to fast training and testing times. Octrees have the advantage of being generalized to an arbitrary number of dimensions without any extra issue. Regarding such generalization potential, octrees can extend their clustering capabilities to more than two clusters, therefore facilitating the proposed IC quality binning approach without any incurred overhead. Further, the octree encoding algorithm is deterministic as it does not rely on a minimization algorithm as many of the state of the art clustering methods do. This is a desirable feature since the resulting encoding does not depend on convergence issues or the considered initial conditions. The simplistic recursive implementation, both for training and testing, make them affordable and easy to implement in stand alone systems as well as convenient for BIST applications. Within the current "more than Moore" scenario, testing heterogeneous devices entangles a series of non trivial challenges which are even harder to cope than the ones existing in traditional CMOS circuits. This is so because of their inherently non electrical nature, depending on the exploited transduction principle, creates the need of complex stimuli generation. For the particular case of MEMS accelerometers, a mechanical excitation stimulus is needed in order to emulate in field operation. In this thesis, a method consisting on a variable speed vertical spinning wheel mounting the device under test has been proposed. The composition of output signals under such excitation conditions yields to an analog trace characterizing the defect level. The analog signature is used to test the device based on the octree encoding of the alternate measurements space or used for diagnosis purposes by means of a signature compaction and feature extraction procedure. The selection and acquisition of analog signatures for alternate mixed-signal testing is an issue of major concern in the field. This thesis proposes a selection algorithm based on redundancy avoidance within the selected set of indirect measurements yet keeping the maximum information to perform the test decision. The application of such selection algorithm immediately translates into better test results. La industria de fabricación de circuitos integrados siempre se ha enfrentado a la necesidad de testar y verificar los circuitos con el objetivo de garantizar que ningún dispositivo defectuoso llega al mercado y que los circuitos fabricados cumplen sus especificaciones de diseño durante toda su vida de servicio. En el marco actual, la consecución de este objetivo conlleva considerables implicaciones económicas así como desafíos tecnológicos importantes. El test de circuitos analógicos y de señal mixta supone un reto todavía mayor ya que no existen metodologías eficientes ni sistemáticas para afrontarlo. Estos retos están fuertemente ligados a las variaciones de proceso inducidas por la continua miniaturización de los transistores así como también las condiciones de operación de cada circuito (variaciones PVTA). Contrariamente al test clásico o basado en especificaciones, se han ido adoptando técnicas de test alternativo como una solución prometedora en el escenario mencionado. Esta tesis propone una metodología novedosa para codificar las regiones de pass/fail en test alternativo de circuitos analógicos y de señal mixta. El método se fundamenta en dos fases. La fase de entrenamiento codifica digitalmente las regiones de aceptación/rechazo en el espacio de medidas alternativas usando octrees. La fase de test se corresponde con el proceso de test en producción usando la estructura de datos previamente computada. Esta codificación digital presenta una serie de ventajas, principalmente en términos de eficiencia computacional ya que la estructura octree resultante es inherentemente dispersa, lo que implica un rápido entrenamiento y test. Los octrees presentan la ventaja de ser fácilmente generalizables a un número arbitrario de dimensiones sin mayores inconvenientes. Con respecto a esta capacidad de generalización, sus capacidades de clasificación pueden extenderse a más de dos clusters, permitiendo así su uso en binning de calidad sin mayor overhead. El algoritmo de codificación con octrees es determinista ya que no depende de algoritmos de minimización como la mayoría de los métodos de clasificación del estado del arte. Esta es una cualidad deseable pues la codificación resultante no presenta problemas de convergencia ni depende de las condiciones iniciales consideradas. La implementación recursiva, tanto para la fase de entrenamiento como de test, los hace asequibles para su implementación en sistemas autónomos y convenientes para aplicaciones BIST. Dentro del escenario "más que Moore" actual, el test de sistemas heterogéneos conlleva una serie de retos no triviales ya que son incluso más difíciles de solventar que los existentes en circuitos CMOS clásicos. Esto es así debido a su inherente naturaleza no eléctrica pues crea la necesidad de generación de estímulos complejos. Par el caso particular de acelerómetros MEMS, se requiere una excitación mecánica para emular el funcionamiento en campo del dispositivo. Esta tesis propone el uso de una rueda vertical de velocidad variable en la cual se monta el dispositivo bajo test. La composición de las señales de salida da lugar a una firma analógica que caracteriza el nivel de defecto. Esta signatura analógica se usa para testar el dispositivo usando una codificación con octrees del espacio de medidas alternativas o bien para diagnóstico mediante un proceso de compactación y extracción de características. La selección y adquisición de signaturas analógicas para test alternativo de circuitos de señal mixta es un tema importante en el campo. Esta tesis propone un algoritmo de selección cuyo objetivo es evitar la redundancia dentro del conjunto de medidas indirectas seleccionado mientras se intenta mantener la máxima información de éstas para tomar la decisión de test. La aplicación de este algoritmo de selección se traduce en la mejora inmediata de los resultados de test.

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True non-intrusive sensors for RF built-in test

Cited by 8 publications

References 23 publications

Exploring on-line RF performance monitoring based on the indirect test strategy

Exploring on-line RF performance monitoring based on the indirect test strategy

Process independent gain measurement with low overhead via BIST/DUT co-design

Mixed-signal alternate test and binning using digitally encoded signatures

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