True Random Number Generator based on compact chaotic oscillator

Jiteurtragool, Nattagit; Wannaboon, Chatchai; Tachibana, Masayoshi

doi:10.1109/iscit.2015.7458370

Cited by 9 publications

(4 citation statements)

References 8 publications

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“…To improve the entropy of the random bit stream, a postprocessing step, based on a XOR gate is added as already proposed in previous studies found in the literature [20][21][22][23]. We propose to add, either directly inserted in the circuit or during a post-processing phase of the data, a XOR operation having as inputs the 49 bits of the array.…”

Section: Nist Results After Xor Operationmentioning

confidence: 99%

“…Besides, as the proposed methodology relies on a whole memory array, instead of a single cell, the proposed TRNG is turned more reliable. A post-processing can be added to improve the entropy of the random bit stream as already proposed in previous studies found in the literature [20][21][22][23]. In our case, only a XOR operation is applied to the memory array bits to generate a single bit response.…”

Section: Introductionmentioning

confidence: 99%

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True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

Aziza

Postel-Pellerin

Bazzi

et al. 2020

IEEE Trans. Nanotechnology

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A novel True Random Number Generator circuit fabricated in a 130nm HfO2-based resistive RAM process is presented. The generation of the random bit stream is based on a specific programming sequence applied to a dedicated memory array. In the proposed programming scheme, all the cells of the memory array are addressed at the same time while the current provided to the circuit is limited to program only a subset of the memory array, resulting in a stochastic distribution of cell resistance values. Some cells are switched in a low resistive state, other cells are slightly programmed to reach an intermediate resistance state, while the remaining cells maintain their initial high resistance state. Resistance values are next converted into a bit stream and confronted to National Institute of Standards and Technology (NIST) test benchmarks. The generated random bit stream has successfully passed twelve NIST tests out of fifteen. Compared to state-of-the-art resistive RAM-based true random number generators, our proposed methodology is the first one to leverage on programming current limitation at a memory array level.

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Section: Nist Results After Xor Operationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

Aziza

Postel-Pellerin

Bazzi

et al. 2020

IEEE Trans. Nanotechnology

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“…e output bitstream of TRNG implemented in 45 nm CMOS process was tested by NIST test suite and it passed 11 tests with throughput of 127 MB/s. Jiteurtragool et al [70] proposed a TRNG for discrete time chaotic oscillator based on 0.18 µm CMOS technology. A chaotic oscillator was designed by using three transistor mapping circuits and approximating V-shaped mapping as a chaotic nonlinear function.…”

Section: Discrete Time Chaotic Oscillator Discrete Time Chaoticmentioning

confidence: 99%

A Survey on True Random Number Generators Based on Chaos

Tang

et al. 2019

Discrete Dynamics in Nature and Society

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With the rapid development of communication technology and the popularization of network, information security has been highly valued by all walks of life. Random numbers are used in many cryptographic protocols, key management, identity authentication, image encryption, and so on. True random numbers (TRNs) have better randomness and unpredictability in encryption and key than pseudorandom numbers (PRNs). Chaos has good features of sensitive dependence on initial conditions, randomness, periodicity, and reproduction. These demands coincide with the rise of TRNs generating approaches in chaos field. This survey paper intends to provide a systematic review of true random number generators (TRNGs) based on chaos. Firstly, the two kinds of popular chaotic systems for generating TRNs based on chaos, including continuous time chaotic system and discrete time chaotic system are introduced. The main approaches and challenges are exposed to help researchers decide which are the ones that best suit their needs and goals. Then, existing methods are reviewed, highlighting their contributions and their significance in the field. We also devote a part of the paper to review TRNGs based on current-mode chaos for this problem. Finally, quantitative results are given for the described methods in which they were evaluated, following up with a discussion of the results. At last, we point out a set of promising future works and draw our own conclusions about the state of the art of TRNGs based on chaos.

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“…It is important to remember that although TRNGs provide true randomness, they can use more resources and have lower performance than PRNGs. To combine randomness and efficiency, some applications may use a combination of both TRNG and PRNG algorithms [9,11]. A simple and efficient technique to generate TRNGs on FPGA is to design using a ring oscillator as an entropy source [23] set up with n+1 numbers of series-connected inverters is shown in Figure 1.…”

Section: Introductionmentioning

confidence: 99%

Efficient Design of True Random Number Generator using multiple Ring Oscillator for key generation

Patel,

Gupta

2024

Preprint

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This work investigates the contribution and design with the 31 number of ring oscillators and constituent inverters and the truly randomness of non-deterministic Number Generators using ring oscillators on Field Programmable gate Array (FPGA). They are being used more often to create cryptographic systems for the reason of their similar encryption speed to system and resource efficiency. A conventional ring oscillator designed by using of n + 1 number of inverters, with the last inverter's output being fed back into the first one's input. Non deterministic number generator uses metastability states to generate random numbers and hence it uses an alternate source of jitter for entropy. In this menuscript the proposed design are implemented in the xillinx Vivado version 2018.3 in the environment of FPGA family Artix-7 (XC7A100TCSG324-1) with different numbers of constituent inverters and ring oscillators. The proposed True Random Number Generator (TRNG) design achieved 432.25 Mbp/s with 83.355 gain and consume 14.5% less power compare to some designs. The random bit streams generated from it pass all tests in the NIST statistical test suite.

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True Random Number Generator based on compact chaotic oscillator

Cited by 9 publications

References 8 publications

True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

A Survey on True Random Number Generators Based on Chaos

Efficient Design of True Random Number Generator using multiple Ring Oscillator for key generation

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