Tunnel FET ambipolarity‐based energy efficient and robust true random number generator against reverse engineering attacks

Japa, Aditya; Majumder, Manoj Kumar; Sahoo, Subhendu Kumar; Vaddi, Ramesh

doi:10.1049/iet-cds.2018.5297

Cited by 7 publications

(7 citation statements)

References 33 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Therefore, this paper explores emerging TFET device characteristics in designing low area overhead DPA countermeasure with no additional critical path delay. In recent work, the authors have presented the concept of TFET RNG [30]. In this new contribution, we have explained the unconventional behaviour of TFET transmission gate and demonstrated that this effect is because of the p-i-n forward current of TFET rather than the ambipolar current.…”

Section: Introductionmentioning

confidence: 88%

Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator

Japa

Majumder

Sahoo

et al. 2020

IET Circuits, Devices & Systems

Self Cite

View full text Add to dashboard Cite

Differential power analysis (DPA) has become an efficient side channel attack that obtains a secret key from the extracted power traces. Several traditional CMOS-based DPA countermeasures resulted in high area overhead and performance degradation. This study presents low area overhead DPA countermeasure exploring tunnel field effect transistors (TFET) based random number generator (RNG). TFET exhibits significant p-in forward current with an increase in negative drain-to-source voltage bias. It is demonstrated that TFET transmission gate exhibits unconventional behaviour due to p-in forward current of the device. Leveraging this behaviour TFET RNG is designed that extracts random bits from delay variations of the TFET ring oscillator. The proposed TFET RNG achieves low area overhead when compared with the baseline CMOS designs. The proposed DPA countermeasure is demonstrated by integrating the original TFET substitution box (S-box) and TFET RNG. The proposed architecture is found to be resilient to DPA attack and the area overhead of single S-box and Advanced Encryption Standard AES is as low as 12 and 5%, respectively. Apart from low area overhead, the TFET designs with inherent device characteristics show high robustness against reverse engineering attacks which provide a higher level of security to TFET-based circuits and systems.

show abstract

Section: Introductionmentioning

confidence: 88%

Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator

Japa

Majumder

Sahoo

et al. 2020

IET Circuits, Devices & Systems

Self Cite

View full text Add to dashboard Cite

show abstract

“…Further, a discussion has been presented by comparing the proposed design with existing literature. [8][9][10]34,[43][44][45] F I G U R E 5 TFET TG (A) ON and asymmetrical switching mechanism (B) simulated transient response at 0.5-V supply voltage [Colour figure can be viewed at wileyonlinelibrary.com]…”

Section: Proposed Design and Analysismentioning

confidence: 99%

“…The characteristics and detailed analysis of RO have been presented in the prior works. 34,35 Apart from this, a 10-bit counter is explored to record the oscillations of TFET RO. To update the output of reconfigurable TRNG and PUF design in every clock (CLK) cycle, a 10-bit register is also used.…”

Section: Designmentioning

confidence: 99%

“…32,33 Orthogonal to this, the p-i-n forward current of TFET is explored as favorable feature to enhance the hardware security of circuits/systems. [34][35][36] In the recent works, authors have proposed TFET p-i-n forward based TRNG design that shows higher resilience towards reverse engineering attacks. 34 Leveraging the p-i-n forward current, TFET-based differential power analysis resistant crypto circuits have been demonstrated that achieve lower area overhead.…”

Section: Introductionmentioning

confidence: 99%

“…[34][35][36] In the recent works, authors have proposed TFET p-i-n forward based TRNG design that shows higher resilience towards reverse engineering attacks. 34 Leveraging the p-i-n forward current, TFET-based differential power analysis resistant crypto circuits have been demonstrated that achieve lower area overhead. 35 In addition, TFET p-i-n forward current is utilized to modify the flip-flop functionality for device-level hardware obfuscation application.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Tunnel FET‐based ultra‐lightweight reconfigurable TRNG and PUF design for resource‐constrained internet of things

Japa

Majumder

Sahoo

et al. 2021

Circuit Theory & Apps

Self Cite

View full text Add to dashboard Cite

Conventional complementary metal oxide semiconductor (CMOS)-based dedicated true random number generator (TRNG) and physically unclonable function (PUF) designs have exhibited higher energy consumption and large area overhead with technology scaling. In contrast, this paper for the first time presents emerging tunnel field-effect transistor (TFET)-based ultra-lightweight reconfigurable TRNG and PUF design. A unique methodology is proposed that considers p-i-n forward current characteristics to generate random keys for PUF and TRNG designs. Leveraging the p-i-n forward current of TFET, a ring oscillator (RO) is designed that exhibits variation in the operating frequency and acts as the main source of entropy for both PUF and TRNG. The TRNG in the proposed design is robust and passed all the National Institute of Standards and Technology (NIST) tests. Considering the variation in p-i-n forward current, the uniqueness of PUF is calculated as 47.5% and 46% at a supply voltage of 0.5 and 0.45 V, respectively. Moreover, PUF achieves high reliability of 82% and 88.7% with supply voltage and temperature variations, respectively. The proposed design is proved to be compact with relatively lower gate count and shows low energy consumption of 4.8 pJ/bit at 0.5-V supply voltage. With these performance metrics, the proposed design is highly suitable for resourceconstrained internet of things (IoT). K E Y W O R D Sinternet of things (IoT), physically unclonable function (PUF), p-i-n forward leakage, true random number generator (TRNG), tunnel field-effect transistor (TFET)

show abstract

Hardware and Information Security Primitives Based on 2D Materials and Devices

Wali

Das

2023

Advanced Materials

View full text Add to dashboard Cite

Hardware security is a major concern for the entire semiconductor ecosystem that accounts for billions of dollars in annual losses. Similarly, information security is a critical need for the rapidly proliferating edge devices that continuously collect and communicate a massive volume of data. While silicon‐based complementary metal‐oxide‐semiconductor technology offers security solutions, these are largely inadequate, inefficient, and often inconclusive, as well as resource intensive in time, energy, and cost, leading to tremendous room for innovation in this field. Furthermore, silicon‐based security primitives have shown vulnerability to machine learning (ML) attacks. In recent years, 2D materials such as graphene and transition metal dichalcogenides have been intensely explored to mitigate these security challenges. In this review, 2D‐materials‐based hardware security solutions such as camouflaging, true random number generation, watermarking, anticounterfeiting, physically unclonable functions, and logic locking of integrated circuits (ICs) are summarized with accompanying discussion on their reliability and resilience to ML attacks. In addition, the role of native defects in 2D materials in developing high entropy hardware security primitives is also examined. Finally, the existing challenges for 2D materials, which must be overcome for large‐scale deployment of 2D ICs to meet the security needs of the semiconductor industry, are discussed.

show abstract

Tunnel FET ambipolarity‐based energy efficient and robust true random number generator against reverse engineering attacks

Cited by 7 publications

References 33 publications

Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator

Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator

Tunnel FET‐based ultra‐lightweight reconfigurable TRNG and PUF design for resource‐constrained internet of things

Hardware and Information Security Primitives Based on 2D Materials and Devices

Contact Info

Product

Resources

About