Tunnel oxide passivated carrier-selective contacts based on ultra-thin SiO 2 layers

Moldovan, Anamaria; Feldmann, Frank; Zimmer, Martin; Rentsch, J.; Benick, Jan; Hermle, Martin

doi:10.1016/j.solmat.2015.06.048

Cited by 215 publications

(141 citation statements)

References 15 publications

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“…An alternative type of CSPC featuring higher thermal budget was proposed by Yablonovich et aland is the so‐called semi‐insulating polycrystalline silicon (SIPOS) hetero‐structure as a mixture of microcrystalline silicon and silicon oxide. Several research groups have recently further developed such device scheme consisting of an ultra‐thin silicon oxide (SiO 2 ) (<2 nm) layer grown on the c‐Si surfaces coated by in situ or ex situ doped polycrystalline silicon (poly‐Si) layer deposited via low‐pressure/plasma‐enhanced chemical vapor deposition (LP/PECVD) techniques . The thin SiO 2 provides excellent chemical passivation of c‐Si interface defects and also acts as a barrier that allows the collection of only majority carriers at poly‐Si contact .…”

Section: Introductionmentioning

confidence: 99%

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Limodio

Yang

Groot

et al. 2020

Progress in Photovoltaics

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In this work, we develop SiOx/poly‐Si carrier‐selective contacts grown by low‐pressure chemical vapor deposition and boron or phosphorus doped by ion implantation. We investigate their passivation properties on symmetric structures while varying the thickness of poly‐Si in a wide range (20‐250 nm). Dose and energy of implantation as well as temperature and time of annealing were optimized, achieving implied open‐circuit voltage well above 700 mV for electron‐selective contacts regardless the poly‐Si layer thickness. In case of hole‐selective contacts, the passivation quality decreases by thinning the poly‐Si layer. For both poly‐Si doping types, forming gas annealing helps to augment the passivation quality. The optimized doped poly‐Si layers are then implemented in c‐Si solar cells featuring SiO2/poly‐Si contacts with different polarities on both front and rear sides in a lean manufacturing process free from transparent conductive oxide (TCO). At cell level, open‐circuit voltage degrades when thinner p‐type poly‐Si layer is employed, while a consistent gain in short circuit current is measured when front poly‐Si thickness is thinned down from 250 to 35 nm (up to +4 mA/cm2). We circumvent this limitation by decoupling front and rear layer thickness obtaining, on one hand, reasonably high current (JSC‐EQE = 38.2 mA/cm2) and, on the other hand, relatively high VOC of approximately 690 mV. The best TCO‐free device using Ti‐seeded Cu‐plated front contact exhibits a fill factor of 75.2% and conversion efficiency of 19.6%.

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Section: Introductionmentioning

confidence: 99%

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Limodio

Yang

Groot

et al. 2020

Progress in Photovoltaics

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“…Typical examples are passivated contacts in silicon solar cells [1,2], intermediate layers in metal-insulatorsemiconductor (MIS) solar cells [3], passivation of the amorphous/crystalline silicon (a-Si:H/c-Si) heterojunction [4][5][6], and barrier layer in silicon-based single and multi-junction quantum well solar cells [7,8]. Very recently, 25.1 % efficiency was achieved on a both sides-contacted Si solar cell featuring tunnel oxide passivated contacts [9].…”

Section: Introductionmentioning

confidence: 99%

Ultra-thin silicon oxide layers on crystalline silicon wafers: Comparison of advanced oxidation techniques with respect to chemically abrupt SiO 2 /Si interfaces with low defect densities

Stegemann

Gad

Balamou

et al. 2017

Applied Surface Science

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“…To achieve further improvements in the surface passivation quality, we made use of a thermal oxide grown at 600 °C in a tube furnace. The advantage of this tunnel oxide is its higher stoichiometry which should result in an improved thermal stability, which also results in higher optimum annealing temperatures (900 °C for the thermal oxide compared to 850 °C for the HNO 3 oxide). Figure shows the injection‐dependent minority carrier lifetime τ in dependence on the excess carrier density Δ n for samples featuring an interfacial oxide either grown in HNO 3 or thermally in a tube furnace (TO) after hydrogen passivation.…”

Section: Resultsmentioning

confidence: 99%

Excellent Surface Passivation Quality on Crystalline Silicon Using Industrial‐Scale Direct‐Plasma TOPCon Deposition Technology

et al. 2018

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Passivating contacts based on a thin SiOx layer and a doped Si layer (TOPCon) are an appealing choice for pushing the efficiency of Si solar cells. One way to deposit the doped Si layer is to utilize radio‐frequency direct plasma‐enhanced chemical vapor deposition as commonly used in industry for the deposition of silicon nitride. However, due to the low operating frequency in the kHz range, there are concerns that ion bombardment might damage the thin SiOx layer and thus prevent suitable surface passivation. We demonstrate that this is not the case. Instead, the application of these layers on c‐Si results in excellent surface passivation. Minority carrier lifetimes exceeding the intrinsic bulk limit predicted by current models on 1 Ω cm n‐type were observed, out‐performing the reference layers. The excellent surface passivation results in an implied VOC of above 735 mV and an implied FF of almost 88% on 200 µm thick n‐type c‐Si. Furthermore, a lifetime test on 100 Ω cm n‐type c‐Si revealed an extraordinary lifetime of 190 ms (Δn = 1 × 1014 cm−3).

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Tunnel oxide passivated carrier-selective contacts based on ultra-thin SiO 2 layers

Cited by 215 publications

References 15 publications

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Ultra-thin silicon oxide layers on crystalline silicon wafers: Comparison of advanced oxidation techniques with respect to chemically abrupt SiO 2 /Si interfaces with low defect densities

Excellent Surface Passivation Quality on Crystalline Silicon Using Industrial‐Scale Direct‐Plasma TOPCon Deposition Technology

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