We demonstrate single-electron operation of a 1 bit adder circuit using GaAs single-electron tunneling transistors ͑SETs͒. GaAs dot and wire coupled structures for the fabrication of SETs were grown by a selective-area metalorganic vapor-phase epitaxy technique. The logic circuit was realized based on a binary decision diagram architecture using Coulomb blockade ͑CB͒ in GaAs dots and switching operations were achieved in a single-electron mode because of the CB effects. Through this architecture, a 1 bit adder circuit was realized with three SETs, two of which were for AND logic and one with two input gates for exclusive OR ͑XOR͒. Both AND and XOR operations were demonstrated at 1.9 K, which indicated successful fabrication of the 1 bit adder. © 2005 American Institute of Physics. ͓DOI: 10.1063/1.1992665͔Single-electron transistors ͑SETs͒ and their integrated circuits are very promising for future large-scale integrated circuits ͑LSIs͒ because of their potential with regard to ultralow power consumption and large-scale integration.1-3 Up to now, SET circuits using complementary metal-oxidesemiconductor ͑CMOS͒-type logic architectures have been developed. [4][5][6][7] However, the practical problems of highdensity integration, such as small gain and the unilateral nature of the devices, impede the replacement of the CMOS logic circuits of current large-scale integrated circuits ͑LSIs͒ in a conventional architecture. Thus, a binary decision diagram ͑BDD͒ -based architecture has been proposed for single-electron logic system applications to overcome these shortcomings. [8][9][10][11] In this architecture, the key device that is a unit element of the circuit is called a BDD node device, and it works as a path switch for single-electron transport between two branches using Coulomb blockade. In this way, the function of any complicated logic can be realized through the combination of node devices. In our previous study, we reported on GaAs AND/NAND logic circuits based on BDD integration of four GaAs single-electron transistors ͑SETs͒ fabricated through selective-area metalorganic vapor-phase epitaxy ͑SA-MOVPE͒.3 This is feasible if a network-like structure of SET arrays is realized, because the BDD logic architecture is based on a graphical representation of the logic. In this letter, we report on the fabrication and experimental operation of a 1 bit BDD adder based on selforganized network-like structures of dot-wire coupled arrays for single-electron circuits. Figures 1͑a͒ and 1͑b͒ show, respectively, a graphic representation and a scanning electron microscope ͑SEM͒ image of the GaAs 1 bit BDD adder. Three SETs are integrated in this circuit, consisting of four ohmic pads ͑T1, T2, T3, T4͒ for the BDD terminals, two main gates ͑MG1, MG2͒, and three control gates ͑CG1, CG2, CG3͒. The main gates correspond to the input for the 1 bit adder. Each control gate is used to form the quantum dot and tunneling barriers and to tune the phase of Coulomb oscillations.
12The operating principle of this circuit as a BDD 1 bit adde...