Ultra-fast LIGBTs and superjunction devices in membrane technology

Udrea, F.; Trajković, T.; Lee, C.; Garner, David M.; Yuan, Xue-Ming; Joyce, J.M.; Udugampola, N.; Bonnet, G.; Coulson, Dale M.; Jacques, R.; Izmajlowicz, M. A. T.; Schouten, N. van der Duijn; Ansari, Zahed Ahmed; Moyse, P.; Amaratunga, G.A.J.

doi:10.1109/ispsd.2005.1488002

Cited by 23 publications

(5 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Two LIGBTs (conventional design and super junction design) built on thin membrane were reported in 2005 [91]. The conventional membrane LIGBT built on a thin membrane of 0.25µm achieved a BV more than 700V with higher current density than the super junction membrane LIGBT which exhibited only slightly increased BV due to doping tolerance impact [92][93] as it employed charge compensation techniques that led to virtually ideal square-type electric field distribution in the drift region.…”

Section: Membrane Ligbtsmentioning

confidence: 99%

A Review of techniques used in Lateral Insulated Gate Bipolar Transistor (LIGBT)

Tee¹

2012

IOSRJEEE

View full text Add to dashboard Cite

Section: Membrane Ligbtsmentioning

confidence: 99%

A Review of techniques used in Lateral Insulated Gate Bipolar Transistor (LIGBT)

Tee¹

2012

IOSRJEEE

View full text Add to dashboard Cite

“…Using back-etched or membrane technology to remove the supporting silicon substrate can effectively eliminate the SAD effect in the devices, as shown in Figure 14 [29,30]. In this case, the SJ-LDMOS is implemented on an SOI wafer and the supporting substrate is removed by using anisotropic or reactive etching techniques.…”

Section: Sj-ldmos On Soi Substratementioning

confidence: 99%

“…The removal of the substrate allows an ideal distribution of potential throughout the entire drift region. An experimental device with drift lengths of 15.5 μm [29] and 50 μm [30] exhibits the BV of 317 and 900V, respectively. However, the structures still exhibit relatively high on-resistance due to thin silicon film.…”

Section: Sj-ldmos On Soi Substratementioning

confidence: 99%

A Review of Super Junction LDMOS

et al. 2011

IETE Tech Rev

View full text Add to dashboard Cite

Super Junction Lateral Double-diffused MOSFET (SJ-LDMOS) is one of the important attractive devices in high-voltage integrated circuit and power integrated circuit. However, the SJ-LDMOS is generally implemented on a low-resistance substrate, which always suffers from substrate-assisted depletion (SAD) effect, which thus degrades the performance of devices. A number of literatures have been published to solve the SAD effect and improve performance. This review summarizes the developments made in SJ-LDMOS based on bulk silicon, silicon on insulator, and silicon on sapphire in the last 10 years. Finally, the future work what researchers can do on the SJ-LDMOS also has been proposed.

show abstract

“…For lateral devices, the SJ is equivalent to a multiple RESURF concept which should give an ideal quadratic scaling of R on with the BV. The SJ concept is also applicable to both discrete (vertical) IGBTs [11,12] and lateral LIGBTs [13,14]. During the first development of the SJ LIGBT on partial SOI, the device was found to be leaky.…”

Section: Introductionmentioning

confidence: 99%