Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture

Abstract

Emerging memristor-based computing has the potential to achieve higher computational efficiency over conventional architectures. Bit-slicing scheme, which represents a single neural weight using multiple memristive devices, is usually introduced in memristor-based neural networks to meet high bitprecision demands. However, the accuracy of such networks can be significantly degraded due to non-zero minimum conductance (G min ) of memristive devices. This paper proposes an unbalanced bit-slicing scheme; it uses smaller slice sizes for more important bits to provide higher sensing margin and reduces the impact of non-zero G min . Moreover, the unbalanced bit-slicing is assisted by 2's complement arithmetic which further improves the accuracy. Simulation results show that our proposed scheme can achieve up to 8.8× and 1.8× accuracy compared to state-of-the-art for single-bit and two-bit configurations respectively, at reasonable energy overheads.

Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing

“…The addresses of each cell are reported in column 5. According to Table II and based on the NN application requirements, favorable conductance states presenting low CV values can be chosen to map significant weights [9]. Conversely, conductance states presenting high CV values (such as the worst cell in Table II last column) can be skipped during the weight mapping process due less immunity to variations.…”

“…Therefore, detecting devices suffering from variability issues is a crucial step before considering a mapping-aware training methodology practical implementation. However, in this case as well, this aspect is not taken into account in many publications [9]. In this context, this paper advances the state-of the art by providing a silicon-based analysis of the conductance variability in RRAMs.…”

Severity-Based Hierarchical ECG Classification Using Neural Networks

“…Moreover, RRAM devices overcome the technological challenges faced by CMOS as they are non-volatile (leakage-free), highly scalable, and small in size. Thus, CIM becomes a promising alternative to the conventional hardware for neural networks [39], [40], [41], [42]. Hence, we select the RRAM-based CIM paradigm to implement the neural networks required for the ECG subclassifiers.…”

Dependability of Future Edge-AI Processors: Pandora’s Box

“…2) Unbalanced bit-slicing scheme: This architecture level scheme aims to employ an unbalanced bit-slicing (UBS) scheme in [31], which changes the way neural weights are mapped into a CIM crossbar in order to mitigate the impact of non-zero G min error. The UBS scheme splits the bits of neural weights into unbalanced slices and different number of RRAM devices are allocated per slices in order to minimize the impact of non-zero G min error and improve the sensing margin.…”