Understanding advanced DRAM edge placement error budget and opportunities for control

EPE-aware process optimization for scanner dose and overlay in DRAM use case

“…The e-beam system measures all EPE contributions other than overlay [3]. First, large FoV e-beam images are acquired on both layers independently, and the feature contours are extracted.…”

“…Cross compensation is realized by correlation of top and bottom layer fingerprints. We consider a die to be yielding when the maximum EPE within that die is below an EPE specification which follows from a budget [3] and/or is calibrated against device yield, for instance with Voltage Contrast methodology [4]. Throughout this paper we will refer to the metric Dies in Spec (DiS), which is the fraction of dies in which the EPE is within EPE specification.…”

Overlay and edge placement error metrology in the era of stochastics

“…More recently, the demands of ever-shrinking EPE budgets have been confounded by a new reality: stochastics contributions to EPE are growing rapidly. 2,3 At today's advanced nodes, stochastics can make up more than 50% of the edge placement errors on the wafer. 4 This has given rise to a need for methods to properly account for stochastics in EPE budgets.…”

Improvements in the measurement of local critical dimension uniformity for holes and pillars

“…For the printing of holes and pillars at advanced nodes, stochastic variations are often the dominant source of edge placement errors in the patterning process. 1,2 Edge placement errors, in turn are the combination of critical dimension (CD) errors and pattern placement errors (PPE) for those features. Such stochastic variations are generally referred to as "local" variations since they occur at all length scales, including for neighboring features that would not experience "global" variations such as across-slit, across-field, or acrosswafer errors.…”