Unexpected Performance of Intel® Optane DC Persistent Memory

Mason, Tony; Doudali, Thaleia Dimitra; Seltzer, Margo; Gavrilovska, Ada

doi:10.1109/lca.2020.2987303

Cited by 10 publications

(5 citation statements)

References 10 publications

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“…We use limited mutator and GC threads for each application instance. Mason et al [41] advise optimizing for page size. Huge pages improve performance regardless of the memory type but expose a new trade-off between page fragmentation and total performance.…”

Section: S Akrammentioning

confidence: 99%

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Performance Evaluation of Intel Optane Memory for Managed Workloads

Akram

2021

ACM Trans. Archit. Code Optim.

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Intel Optane memory offers non-volatility, byte addressability, and high capacity. It suits managed workloads that prefer large main memory heaps. We investigate Optane as the main memory for managed (Java) workloads, focusing on performance scalability. As the workload (core count) increases, we note Optane’s performance relative to DRAM. A few workloads incur a slight slowdown on Optane memory, which helps conserve limited DRAM capacity. Unfortunately, other workloads scale poorly beyond a few core counts. This article investigates scaling bottlenecks for Java workloads on Optane memory, analyzing the application, runtime, and microarchitectural interactions. Poorly scaling workloads allocate objects rapidly and access objects in Optane memory frequently. These characteristics slow down the mutator and substantially slow down garbage collection (GC). At the microarchitecture level, load, store, and instruction miss penalties rise. To regain performance, we partition heaps across DRAM and Optane memory, a hybrid that scales considerably better than Optane alone. We exploit state-of-the-art GC approaches to partition heaps. Unfortunately, existing GC approaches needlessly waste DRAM capacity because they ignore runtime behavior. This article also introduces performance impact-guided memory allocation (PIMA) for hybrid memories. PIMA maximizes Optane utilization, allocating in DRAM only if it improves performance. It estimates the performance impact of allocating heaps in either memory type by sampling. We target PIMA at graph analytics workloads, offering a novel performance estimation method and detailed evaluation. PIMA identifies workload phases that benefit from DRAM with high (94.33%) accuracy, incurring only a 2% sampling overhead. PIMA operates stand-alone or combines with prior approaches to offer new performance versus DRAM capacity trade-offs. This work opens up Optane memory to a real-life role as the main memory for Java workloads.

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Section: S Akrammentioning

confidence: 99%

“…They also study its persistent properties for embedded data stores. Mason et al [41] analyze the interaction of page sizes with filesystem extensions for Optane memory. Patil et al [46] use small datasets to explore Optane as the main memory for computational kernels.…”

Section: Related Workmentioning

confidence: 99%

Performance Evaluation of Intel Optane Memory for Managed Workloads

Akram

2021

ACM Trans. Archit. Code Optim.

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“…Since the release of the DCPMM hardware, there have been a number of publications to discuss the hardware properties and features [1][2][3][4] . However, as it is important for the understanding of this paper, we include a brief overview of the most important characteristics here, together with our own basic performance measurements.…”

Section: Hardware Propertiesmentioning

confidence: 99%

Usage Scenarios for Byte-Addressable Persistent Memory in High-Performance and Data Intensive Computing

Weiland¹,

Homölle²

2021

J. Comput. Sci. Technol.

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Byte-addressable persistent memory (B-APM) presents a new opportunity to bridge the performance gap between main memory and storage. In this paper, we present the usage scenarios for this new technology, based on the capabilities of Intel's DCPMM. We outline some of the basic performance characteristics of DCPMM, and explain how it can be configured and used to address the needs of memory and I/O intensive applications in the HPC (high-performance computing) and data intensive domains. Two decision trees are presented to advise on the configuration options for B-APM; their use is illustrated with two examples. We show that the flexibility of the technology has the potential to be truly disruptive, not only because of the performance improvements it can deliver, but also because it allows systems to cater for wider range of applications on homogeneous hardware.

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“…Instead, we can leverage a persistent memory module (PMEM) supporting 10× higher storage capacity with excellent non-volatile capabilities, offered by 3D-Xpoint [13,14], which is a variation of phase change memory (PRAM) [15][16][17]. However, modern systems employing PMEM unfortunately undergo unexpected performance and latency variation [18][19][20]. For example, [18] reports that the processor latency with PMEM is non-deterministic and significantly varies, which is 3× worse than a legacy system using DRAM.…”

Section: Introductionmentioning

confidence: 99%

“…However, modern systems employing PMEM unfortunately undergo unexpected performance and latency variation [18][19][20]. For example, [18] reports that the processor latency with PMEM is non-deterministic and significantly varies, which is 3× worse than a legacy system using DRAM. One of the reasons behind the unexpected latency variation is that the memory complex and DIMM-level microarchitecture of § These authors contributed equally to this work.…”

Section: Introductionmentioning

confidence: 99%

LightPC

Lee

Kwon

Park

2022

Proceedings of the 49th Annual International Symposium on Computer Architecture

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We propose LightPC, a lightweight persistencecentric platform to make the system robust against power loss. LightPC consists of hardware and software subsystems, each being referred to as open-channel PMEM (OC-PMEM) and persistence-centric OS (PecOS). OC-PMEM removes physical and logical boundaries in drawing a line between volatile and nonvolatile data structures by unshackling new memory media from conventional PMEM complex. PecOS provides a single execution persistence cut to quickly convert the execution states to persistent information in cases of a power failure, which can eliminate persistent control overhead. We prototype LightPC's computing complex and OC-PMEM using our custom system board. PecOS is implemented based on Linux 4.19 and Berkeley bootloader on the hardware prototype. Our evaluation results show that OC-PMEM can make user-level performance comparable with a DRAM-only non-persistent system, while consuming 73% lower power and 69% less energy. LightPC also shortens the execution time of diverse HPC, SPEC, and In-memory DB workloads, compared to traditional persistent systems by 4.3×, on average.

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Unexpected Performance of Intel® Optane DC Persistent Memory

Cited by 10 publications

References 10 publications

Performance Evaluation of Intel Optane Memory for Managed Workloads

Performance Evaluation of Intel Optane Memory for Managed Workloads

Usage Scenarios for Byte-Addressable Persistent Memory in High-Performance and Data Intensive Computing

LightPC

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