Uniformity improvement of deep silicon cavities fabricated by plasma etching with 12-inch wafer level

Abstract

The formation of various deep silicon structures using plasma etching has wide applications in sensors, micro-electro-mechanical systems and 3D wafer level integration. However, the fabrication of silicon cavities with high accuracy at depth within a large wafer size is still a challenge due to the large amount of etching required. Herein, silicon cavity etching uniformity approaching 3% in a depth of ~100 µm on a 12-inch wafer is achieved through tuning the focus ring height, baffle shape, double zone helium cooling system and chamber pressure. The simulation of the electromagnetic field and gas flow field separately provides the guidance for the improvement, and the way in which the wafer temperature influences the etch uniformity is demonstrated. These results have significance for both the understanding of the plasma etching mechanism and the practical application of the silicon etching process for advanced device fabrication.

Towards tilt-free in plasma etching

“…The best results have tilt effect solely outside EE 1 mm, and the etch depth uniformity reaches <1%, which is better than the current criteria in industrial community (uniformity <3% with EE 3 mm). It is noted that the electric field distortion is almost the same when the focus ring height is larger than 5 mm [17]. Thus, only the electric field distortion cannot explain the change of tilt angle when the focus ring height is larger than 5 mm, and gas flow field can be the potential explain for the tilt effect.…”

“…The tilt angles obtained in the TSV etching are similar to that of the trench etching (figure S13). To optimize the gas flow field in the y direction, the focus ring was changed to be 6 mm, and a baffle with diameter of 320 mm was added in the chamber [17]. From the simulation results, an intersection between the x axis and the gas flow field in the y direction is clearly evidenced at the position of EE ∼14 mm (figures 4(a)-(d)), which is also schematically shown in figure S14.…”

“…The high silicon exposure ratio (∼49.8%) in the wafer with silicon cavity guarantees that the gas will not be impeded to entering the cavity microstructure (i.e. shadowing effect can be excluded) [12,17], and the sidewalls of the cavity microstructure facilitate the comparison of the gas flow along the direction of the wafer edge/center. The thickness of the fluorocarbon polymer on the wafer surface coincide with the simulation results of the gas flow velocity (figure 3(b)).…”

“…Accordingly, greater challenges are presented to improve the etching uniformity of the etching apparatus. In one of our previous works, we have demonstrated the etch depth uniformity improvement of the 12 inch wafer with large silicon exposure ratio [17]. Due to the influence of tip/edge effect, the electrostatic field will be distorted at the edge, and the etch depth near the edge is different from that far from the edge because the microstructures have different tilt angles [18].…”

Science-based, data-driven developments in plasma processing for material synthesis and device-integration technologies

“…128) The uniformity across the large area of wafer has been attracted attention in plasma sheath formation around the edge and gap of focus ring. [129][130][131][132] Electric field reversals (EFRs) in the sheath and presheath, the electronegative nature, and increasing mole fractions of O 2 impede electron transport to the surface, which further increases EFR. [133][134][135] The 2D axisymmetric plasma sheath model predicted ion trajectory deviations at the plasma-wafer interface for actual chamber geometries and etch conditions.…”