Unraveling the Dynamics of Charge Trapping and De-Trapping in Ferroelectric FETs

Deng, Shan; Zhao, Zijian; Kim, You Sung; Duenkel, Stefan; MacMahon, David; Tiwari, Ravi; Choudhury, Nilotpal; Beyer, Sven; Gong, Xiao; Kurinec, Santosh; Ni, Kai

doi:10.1109/ted.2022.3143485

Cited by 32 publications

(12 citation statements)

References 30 publications

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“…The data suggest that a slight increase in V W results in a decrease of t S by orders of magnitude, exhibiting an extremely steep time-voltage relation, which is desired for nonvolatile memory technology. The behavior is not symmetric in polarity owing to the asymmetric metal-FE-dielectric-semiconductor structure, and the negative voltage side is skewed likely due to trapping phenomena . Similar switching time-voltage relation (albeit in a narrower range, down to t W = 100 ns) was reported in and was successfully fitted by a classical nucleation theory model, based on the free energy for domain nucleation: t normalS = t 0 · e α / k T · 1 / false( V normalW − V 0 false) 2 where t 0 is the minimal switching time and V 0 is an offset voltage, such that V W – V 0 is the voltage drop across the FE layer.…”

supporting

confidence: 55%

Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

et al. 2023

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The discovery of ferroelectric doped HfO 2 enabled the emergence of scalable and CMOS-compatible ferroelectric field-effect transistor (FeFET) technology which has the potential to meet the growing need for fast, low-power, low-cost, and high-density nonvolatile memory, and neuromorphic devices. Although HfO 2 FeFETs have been widely studied in the past few years, their fundamental switching speed is yet to be explored. Importantly, the shortest polarization time demonstrated to date in HfO 2 -based FeFET was ∼10 ns. Here, we report that a single subnanosecond pulse can fully switch HfO 2based FeFET. We also study the polarization switching kinetics across 11 orders of magnitude in time (300 ps to 8 s) and find a remarkably steep time-voltage relation, which is captured by the classical nucleation theory across this wide range of pulse widths. These results demonstrate the high-speed capabilities of FeFETs and help better understand their fundamental polarization switching speed limits and switching kinetics.

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confidence: 55%

Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

et al. 2023

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“…Retention degradation has been a significant challenge for FeFETs over several decades. The loss of retention over time is attributed to two main reasons: the presence of a depolarization field due to a finite capacitance in series with the ferroelectric layer and the gate leakage followed by trapping and detrapping effect in the interface layers in the gate stack. − Clearly, operation of a CAM cell can be affected because of this issue. If V th of the FeFET in our CAM cell increases with time, the match line (ML) and the sensed output voltage with respect to V SL will shift, as shown in Figure .…”

Section: Resultsmentioning

confidence: 99%

Ferroelectric Content-Addressable Memory Cells with IGZO Channel: Impact of Retention Degradation on the Multibit Operation

Thunder

Lehninger

et al. 2023

ACS Appl. Electron. Mater.

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Indium gallium zinc oxide (IGZO)-based ferroelectric thin-film transistors (FeTFTs) are being vigorously investigated for being deployed in computing-in-memory (CIM) applications. Content-addressable memories (CAMs) are the quintessential example of CIM, which conduct a parallel search over a queue or stack to obtain the matched entries for a given input data. CAM cells offer the ability for massively parallel searches in a single clock cycle throughout an entire CAM array for the input query, thereby enabling pattern matching and searching functionality. Therefore, CAM cells are used extensively for pattern matching or search operations in data-centric computing. This paper investigates the impact of retention degradation on IGZO-based FeTFT on the multibit operation in content CAM cell applications. We propose a scalable multibit 1FeTFT-1T-based CAM cell composed of only one FeTFT and one transistor, thus significantly improving the density and energy efficiency compared with conventional complementary metal–oxide–semiconductor (CMOS)-based CAM. We successfully demonstrate the operations of our proposed CAM with storage and search by exploiting the multilevel states of the experimentally calibrated IGZO-based FeTFT devices. We also investigate the impact of retention degradation on the search operation. Our proposed IGZO-based 3-bit and 2-bit CAM cell shows 104 s and 106 s retention, respectively. The single-bit CAM cell shows lifelong (10 years) retention.

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“…The other possible cause of the hysteresis in the transfer curve is the charge trap phenomenon between the channel and the insulator layer [1], but in that case an opposite shift would be expected; a positive/negative bias applied to the top electrode would attract negative/positive charges at the HZO/Ge interfacial defect states (electron/holes trapping) and as a result the transfer curve would shift to the right/left respectively [15]. Hence it cannot be the dominant mechanism here, but it disturbs the hysteresis caused by the polarization.…”

Section: Resultsmentioning

confidence: 99%

Hf_0.5Zr_0.5O₂-Based Germanium Ferroelectric p-FETs for Nonvolatile Memory Applications

Zacharaki

Chaitoglou

Siannas

et al. 2022

ACS Appl. Electron. Mater.

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Ferroelectric Field-Effect Transistors (FeFETs) with TiN/Hf 0.5 Zr 0.5 O 2 (HZO) gate stack on germanium p-type channel are fabricated as low voltage non-volatile memory (NVM) devices.The clean HZO/Ge interfaces and the absence of a typical passivation oxide layer resulted in stable and robust ferroelectricity without severe wake-up effect. The impact of unpassivated interfacial defect states on germanium surface on the functionality of transistors is examined.The ferroelectric field-effect is clearly observed and remains during electric field cycling at least until 5•10 4 cycles. With the optimum measurement conditions the memory window is MW=0.55 V. Retention measurements up to 10 4 sec show a small reduction to 0.5 V and from data projection it is inferred that the devices are not expected to fail before 10 years. These first results of HZO-based Ge-FeFETs are promising for the realization of gate-first process and reduced total thermal budget. The lower dopant activation annealing of Ge at ~600 o C in comparison with Si at temperatures >1000 o C is compatible with the crystallization annealing of HZO, thus the two annealing processes occur simultaneously in one step.FeFETs suitable for low-power NVM. Ferroelectric (FE) hafnia boosted the realization of the FeFET due to its compatibility with CMOS technology and its stable ferroelectricity at reduced thickness ~ 10 nm in-line with technology scaling trends. The hafnia based FeFET NVMs [2] show synaptic plasticity [3,4] and provide a solution for the implementation of accelerator artificial neural networks for in-memory computing.Early studies focusing on Si:HfO 2 based FeFETs yielded important results with MW ~1.2 V[5] and I on /I off ~10 6 [2]. Hf 1-x Zr x O 2 (HZO) further enhanced the FeFET performance due to better ferroelectric and reliability properties [1,6]. However, there are obstacles in introducing HZO in Si-FeFET technology because HZO cannot sustain the high (>1000 o C) temperature of the source (S)/drain (D) dopant activation annealing in Si. Therefore, the preferred gate first, self-aligned junction definition, necessary for manufacturable scaled HZO Si-FeFETs, is difficult. A possible solution to this problem is the use of Ge channels where dopant activation annealing is performed at much lower temperatures (400-600 o C) allowing for a gate first definition of transistors with FE HZO gates. In fact, this temperature range is compatible with the crystallization annealing of HZO which is used to obtain the FE orthorhombic phase. Thus the two annealing steps can be performed in just one run simplifying processing flow and avoiding degradation of HZO and source and drain regions that might occur during multiple annealings.The use of Ge has additional benefits which are briefly mentioned here. Ge/HZO forms sharp interfacial oxide-free interfaces, as shown in our previous publications [7,8], allowing for lower voltage operation of devices, mitigating, in parallel, charge injection and trapping in HZO near the interface. The latter is considered as th...

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Unraveling the Dynamics of Charge Trapping and De-Trapping in Ferroelectric FETs

Cited by 32 publications

References 30 publications

Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

Ferroelectric Content-Addressable Memory Cells with IGZO Channel: Impact of Retention Degradation on the Multibit Operation

Hf_0.5Zr_0.5O₂-Based Germanium Ferroelectric p-FETs for Nonvolatile Memory Applications

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Unraveling the Dynamics of Charge Trapping and De-Trapping in Ferroelectric FETs

Cited by 32 publications

References 30 publications

Sub-Nanosecond Switching of Si:HfO2 Ferroelectric Field-Effect Transistor

Sub-Nanosecond Switching of Si:HfO2 Ferroelectric Field-Effect Transistor

Ferroelectric Content-Addressable Memory Cells with IGZO Channel: Impact of Retention Degradation on the Multibit Operation

Hf0.5Zr0.5O2-Based Germanium Ferroelectric p-FETs for Nonvolatile Memory Applications

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Product

Resources

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Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

Sub-Nanosecond Switching of Si:HfO₂ Ferroelectric Field-Effect Transistor

Hf_0.5Zr_0.5O₂-Based Germanium Ferroelectric p-FETs for Nonvolatile Memory Applications