Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system

Abstract

Fault-injection based dependability analysis has proved to be an efficient mean to predict the behavior of a circuit in presence of faults. Emulation-based approaches enable fast and flexible analyses of significant designs such as processors running significant application software. This paper presents the results obtained with an encryption application and questions the usefulness and the effectiveness of detection mechanisms in both hardware and software.

Efficiency of probabilistic testability analysis for soft error effect analysis: A case study

“…the circuit is instrumented. The instrumentation is performed on the netlist generated by the synthesis of the RT-Ievel description, using an extension of the solution described in [12] that also allows us to inject bit-flips in flip-flops (FFs) with an Enable signal [13].…”