Using Rewriting to Synthesize Functional Languages to Digital Circuits

Baaij, Christiaan; Kuper, Jan

doi:10.1007/978-3-642-45340-3_2

Cited by 13 publications

(9 citation statements)

References 18 publications

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“…Cλ aSH [2] is a compiler for a subset of Haskell to VHDL. Like ReWire, Cλ aSH uses Haskell itself as a source language and requires some limits be placed on the kinds of algebraic data types used as well as the basic operating types.…”

Section: Discussionmentioning

confidence: 99%

Semantics Driven Hardware Design, Implementation, and Verification with ReWire

Procter

Harrison

Graves

et al. 2015

Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2015 CD-ROM

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There is no such thing as high assurance without high assurance hardware. High assurance hardware is essential, because any and all high assurance systems ultimately depend on hardware that conforms to, and does not undermine, critical system properties and invariants. And yet, high assurance hardware development is stymied by the conceptual gap between formal methods and hardware description languages used by engineers. This paper presents ReWire, a functional programming language providing a suitable foundation for formal verification of hardware designs, and a compiler for that language that translates high-level, semantics-driven designs directly into working hardware. ReWire's design and implementation are presented, along with a case study in the design of a secure multicore processor, demonstrating both ReWire's expressiveness as a programming language and its power as a framework for formal, high-level reasoning about hardware systems.

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Section: Discussionmentioning

confidence: 99%

Semantics Driven Hardware Design, Implementation, and Verification with ReWire

Procter

Harrison

Graves

et al. 2015

Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2015 CD-ROM

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show abstract

“…CλaSH [Baaij and Kuper 2014] is a compiler for a subset of Haskell to VHDL. Like ReWire, CλaSH uses Haskell itself as a source language and requires that some limits be placed on the kinds of algebraic data types used as well as the basic operating types.…”

Section: Related Workmentioning

confidence: 99%

A Principled Approach to Secure Multi-core Processor Design with ReWire

Procter

Harrison

Graves

et al. 2017

ACM Trans. Embed. Comput. Syst.

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There is no such thing as high assurance without high assurance hardware. High assurance hardware is essential because any and all high assurance systems ultimately depend on hardware that conforms to, and does not undermine, critical system properties and invariants. And yet, high assurance hardware development is stymied by the conceptual gap between formal methods and hardware description languages used by engineers. This article advocates a semantics-directed approach to bridge this conceptual gap. We present a case study in the design of secure processors, which are formally derived via principled techniques grounded in functional programming and equational reasoning. The case study comprises the development of secure single-and dual-core variants of a single processor, both based on a common semantic specification of the ISA. We demonstrate via formal equational reasoning that the dual-core processor respects a "nowrite-down" information flow policy. The semantics-directed approach enables a modular and extensible style of system design and verification. The secure processors require only a very small amount of additional code to specify and implement, and their security verification arguments are concise and readable. Our approach rests critically on ReWire, a functional programming language providing a suitable foundation for formal verification of hardware designs. This case study demonstrates both ReWire's expressiveness as a programming language and its power as a framework for formal, high-level reasoning about hardware systems.CCS Concepts: r Security and privacy → Logic and verification; Security in hardware; r Hardware → Hardware description languages and compilation; Functional verification; r Software and its engineering → Functional languages;Additional Key Words and Phrases: Equational reasoning, monads, hardware security, reconfigurable computing ACM Reference Format: Adam Procter, William L. Harrison, Ian Graves, Michela Becchi, and Gerard Allwein. 2017. A principled approach to secure multicore processor design with ReWire.

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“…The Cλash compiler [1,2] adopts many of the same techniques we have to compile a particular Haskell subset to hardware. They, too, start from a GHC front-end to generate Core, then apply rewrite rules (including Danvy's defunctionalization [4] inspired by Reynolds [24]) to transform it into a normal form that can be translated into an HDL.…”

Section: Functional Descriptions To Hardwarementioning

confidence: 99%

“…We use a single functional intermediate representation based on the Glasgow Haskell Compiler's Core [23], allowing us to use Haskell and GHC as a source language. Reynolds [24] pioneered the methodology of transforming programs into successively restricted subsets, which inspired our compiler and many others [2,15,23]. Figure 1 depicts our compiler's framework as a series of transformations yielding a hardware description.…”

Section: Introductionmentioning

confidence: 99%

Hardware synthesis from a recursive functional language

Zhai¹,

Townsend²,

Lairmore³

et al. 2015

2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

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Abstraction in hardware description languages stalled at the register-transfer level decades ago, yet few alternatives have had much success, in part because they provide only modest gains in expressivity. We propose to make a much larger jump: a compiler that synthesizes hardware from behavioral functional specifications. Our compiler translates general Haskell programs into a restricted intermediate representation before applying a series of semantics-preserving transformations, concluding with a simple syntax-directed translation to SystemVerilog. Here, we present the overall framework for this compiler, focusing on the intermediate representations involved and our method for translating general recursive functions into equivalent hardware. We conclude with experimental results that depict the performance and resource usage of the circuitry generated with our compiler.

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Using Rewriting to Synthesize Functional Languages to Digital Circuits

Cited by 13 publications

References 18 publications

Semantics Driven Hardware Design, Implementation, and Verification with ReWire

Semantics Driven Hardware Design, Implementation, and Verification with ReWire

A Principled Approach to Secure Multi-core Processor Design with ReWire

Hardware synthesis from a recursive functional language

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