Validation Method for Hardware-in-the-Loop Simulation Models

Abstract

The advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. HIL (Hardware-in-the-Loop) simulators taking advantage of this technology have revolutionized control hardware and software development for power electronics. Switching frequencies in today's power converters are getting higher and higher, so reducing calculation time steps in HIL simulators is critical, especially if simulating lower power circuits. Faster calculation can be achieved with simpler models or lower resolution. Both possibilities require the validation of the FPGA-synthesizable simulation models to check whether they are correct representations of the simulated main circuit or not. The subject of this paper is a validation method, which treats the simulation error similar as production variance, which can be measured between different instances of the original main circuit.

Power-HIL Application Analysis of a 3-level Inverter for PMSM Machine

“…The system is completely transparent for the DUT, there shall be no difference in the behavior between the simulator and the real hardware and use-cases. An approach to validate the HIL simulation is described in [6,7]. The simulator is usually based on an FPGA to meet the strict timing requirements of the applications.…”