We have demonstrated, via validation to experimental data for TiN and Ru, that the grains which appear in the metal gate stacks of nanoscale CMOS devices can be characterized via a two-parameter Gamma distribution (p-values 0.17 and 0.42 for TiN and Ru). Conversely, a previously presented fit which used Rayleigh distribution does not reproduce the experimental data (p-values 3 × 10 −14 and 0.0029 for TiN and Ru). Poisson Voronoi Diagrams (PVDs) are shown as a suitable algorithm to generate grains with Gamma distribution, via fitting of the distribution of 10000 grains. We have also compared the PVD variability against the Rayleigh model. for both TiN and TaN metal gates, and concluded that Rayleigh approach overestimates the device variability (by 11.9% for the TiN and by 7.14% for the TaN).