Vedic and conventional methods of N × N Binary Multiplication with hardware implementation

Design and Implementation of General Hardware Binary Multiplier (2n x 2n) Bits

“…Multiplication hardware circuits is a significant function electronics circuits in arithmetic operations [1][2]. The multiplication of two binary numbers (2 n x 2 n ) bits and then accumulate the product are among some of the repeatedly used calculation intensive mathematical functions [3][4][5][6] presently implemented in many Digital Signal Processing (DSP) applications such as, convolution, fast Fourier transform, filtering. The multiplication of two binary numbers (2 n x 2 n ) bits also used in microprocessors arithmetic and logic units.…”

“…2 𝐴 𝐻 + 𝐴 𝐿 , and 𝐵 = 22 𝐵 𝐻 + 𝐵 𝐿 𝐶 = 𝐴 𝐵 = ( 2 2 𝐴 𝐻 + 𝐴 𝐿 ) ( 22 𝐵 𝐻 + 𝐵 𝐿 ) 𝐶 = 𝐴 𝐿 𝐵 𝐿 + 2 2 (𝐴 𝐻 𝐵 𝐿 + 𝐴 𝐿 𝐵 𝐻 ) + 24 𝐴 𝐻 𝐵 𝐻 𝐶 = (𝐴 𝐿 𝐵 𝐿 ) 𝐿 + 2 2 (𝐴 𝐿 𝐵 𝐿 ) 𝐻 + 2 2 [(𝐴 𝐻 𝐵 𝐿 ) 𝐿 + 2 2 (𝐴 𝐻 𝐵 𝐿 ) 𝐻 + (𝐴 𝐿 𝐵 𝐻 ) 𝐿 + 2 2 (𝐴 𝐿 𝐵 𝐻 ) 𝐻 ] + 2 4 [(𝐴 𝐻 𝐵 𝐻 ) 𝐿 + 2 2 (𝐴 𝐻 𝐵 𝐻 ) 𝐻 ] 𝐶 = (𝐴 𝐿 𝐵 𝐿 ) 𝐿 + 2 2 [((𝐴 𝐻 𝐵 𝐿 ) 𝐿 + (𝐴 𝐿 𝐵 𝐻 ) 𝐿 ) + (𝐴 𝐿 𝐵 𝐿 ) 𝐻 ]+ 2 4 [((𝐴 𝐻 𝐵 𝐿 ) 𝐻 + (𝐴 𝐿 𝐵 𝐻 ) 𝐻 ) + (𝐴 𝐻 𝐵 𝐻 ) 𝐿 ] + + 2 6 [(𝐴 𝐻 𝐵 𝐻 ) 𝐻 ] In this case we can separate the result (C) into Low and High parts CH and CL, and then separate each part to Low and High as below: 𝐶 = 𝐶 𝐿 + 2 4 𝐶 𝐻 = 𝐶 𝐿𝐿 + 2 2 𝐶 𝐿𝐻 + 2 4 (𝐶 𝐻𝐿 + 2 2 𝐶 𝐻𝐻 ) 𝐶 = 𝐶 𝐿 + 2 4 𝐶 𝐻 = 𝐶 𝐿𝐿 + 2 2 𝐶 𝐿𝐻 + 2 4 𝐶 𝐻𝐿 + 2 6 𝐶 𝐻𝐻 By comparing the two equations we can conclude that: 𝐶 𝐿𝐿 = (𝐴 𝐿 𝐵 𝐿 ) 𝐿 𝐶 𝐿𝐻 = ((𝐴 𝐻 𝐵 𝐿 ) 𝐿 + (𝐴 𝐿 𝐵 𝐻 ) 𝐿 ) + (𝐴 𝐿 𝐵 𝐿 ) 𝐻 𝐶 𝐻𝐿 = ((𝐴 𝐻 𝐵 𝐿 ) 𝐻 + (𝐴 𝐿 𝐵 𝐻 ) 𝐻 ) + (𝐴 𝐻 𝐵 𝐻 ) 𝐿 + 𝑐𝑎𝑟𝑟𝑦 {𝐶 𝐿𝐻 } 𝐶 𝐻𝐻 = (𝐴 𝐻 𝐵 𝐻 ) 𝐻 + 𝑐𝑎𝑟𝑟𝑦 {𝐶 𝐻𝐿 }…”