2023
DOI: 10.1051/e3sconf/202337601090
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Verification methods for complex-functional blocks in CAD for chips deep submicron design standards

Abstract: The article discusses the design stages of very large-scale integrated circuits (VLSI) and the features of the procedure for verifying complex-functional VLSI blocks. The main approaches to microcircuit verification procedures are analyzed to minimize the duration of verification cycles. In practice, a combination of several approaches to verification is usually used.

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Cited by 10 publications
(1 citation statement)
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“…At the system design level, verification procedures can be carried out using standard proprietary packages, for example, Cadence Virtual Component Co-Design (VCC), ConCentric, N2C, Cadence Signal Processing Worksystem, COSSAP [2].…”
Section: Methodsmentioning
confidence: 99%
“…At the system design level, verification procedures can be carried out using standard proprietary packages, for example, Cadence Virtual Component Co-Design (VCC), ConCentric, N2C, Cadence Signal Processing Worksystem, COSSAP [2].…”
Section: Methodsmentioning
confidence: 99%