Verification of Single Event Upset Rate Estimation Methods with On-Orbit Observations

Shoga, M.; Adams, Peter F.; Chenette, D. L.; Koga, R.; Smith, Edward C.

doi:10.1109/tns.1987.4337462

Cited by 31 publications

(7 citation statements)

References 6 publications

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“…This environment corresponds to the well understood galactic cosmic ray environment. Its predictions are consistent with observations [l5, 16,17,18,19]. We now believe that this environment should be the one chosen as a standard for device comparisons.…”

Section: Choice Of Environmentssupporting

confidence: 86%

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Rate prediction for single event effects-a critique

Petersen

Pickel

Adams

et al. 1992

IEEE Trans. Nucl. Sci.

248

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Section: Choice Of Environmentssupporting

confidence: 86%

“…The CREME SEP model predicts that the heavy ion component dominates the SEU rate. However, the TDRS rates are consistent with only proton induced upsets [17,19,28]. This has also been observed on other satellites [29,30].…”

Section: Uncertainties Due To Environment Modelsupporting

confidence: 81%

Rate prediction for single event effects-a critique

Petersen

Pickel

Adams

et al. 1992

IEEE Trans. Nucl. Sci.

248

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“…The Impact of HCP In the developed procedure the numerical function-σ ion (L, θ, ϕ) characterizing the sensitivity of VLSIC to SEE occurrence is established based on the experimental data that are obtained at heavy ion accelerators and interpreted using the model of a "thin sensitive layer" [32]. According to this model, function σ ion (L, θ, ϕ) in formula (2) for arbitrary azimuth angle ϕ (asymmetry in azimuth is assumed) is written in the form (4) where L ef = L/cosθ are the effective values of LET, and one-variable function σ (exp) (L ef ) is invariant with respect to any angle of particle incidence onto the VLSIC surface.…”

Section: Cross Section Of Single Event Effectsmentioning

confidence: 99%

“…At the present time, the effect of SEU occurrence in memory cells of RAM onboard spacecraft is confirmed by numerous flight experiments. The list of the best known such experiments [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17] is given in the Table. In several years after discovering SEU in memory microchips onboard spacecraft, the SEU effect associated with the influence of separate HCP was observed in RAM microchips of the dynamic memory [18]. It was found that in this case SEU were induced by alphaparticles of radioactive isotopes contained in the substance of microchip packages.…”

Section: Introductionmentioning

confidence: 99%

The Rate of Single Event Upsets in Electronic Circuits onboard Spacecraft

Кузнецов

2005

Cosmic Res

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Models and methods in use for quantitative estimates of the occurrence of single event upsets in microchips of orbiting spacecraft are considered. A calculation and experimental technique for determining the rate of these effects is described, taking into account spatial and temporal distributions of the fluxes of highenergy particles in the space and their penetration through protective shields. Examples of its application for the orbit of the International Space Station are presented. Space vehicles (instrumentation modules) used for studying single event inversions of memory cells of RAM VLSIC SpacecraftCountry of instrumentation design References

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“…a Single Event Upset (SEU), in computer memory or combinational logic circuits. SEU effects are found at sea level [24,31], in airborne avionics [19,20], and in space [1,2,5,7,10,12,14,23,24,25,26,27,28,32]. The effect of SEUs on chips has been extensively investigated and programs, e.g.…”

Section: Introductionmentioning

confidence: 99%

System effects of single event upsets

Finn¹

1989

7th Computers in Aerospace Conference

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At the system level, SEUs in processors are controlled by fault-tolerance techniques such as replication and voting, watchdog processors, and tagged data schemes [13,16,30]. SEUs in memory subsystems are controlled by use of error control codes (ECCs) [4,17,21] and a process called scrubbing. The scrubbing process periodically reads each word in the memory. If the number of faulty digits in a word is less than or equal to the number the ECC can correct, then the digits are corrected and the word is written back to memory. If the number of faulty digits exceeds the ECC's capability, the errors cannot be corrected and the memory has failed. Fault-tolerance to memory failures requires either physical redundancy via replication or temporal redundancy via checkpoint rollback schemes. In most aerospace applications physical redundancy is undesirable because mass, volume, and power are at a premium.The rate at which SEUs are scrubbed from memory affects the performance and reliability of the entire computer system. Infrequent scrubbing leads to an accumulation of faults and increases the probability of exceeding the ECC's capability. Conversely, frequent scrubbing uses memory cycles that might otherwise be used by the operating system or an application program.There is a recognized tradeoff between using ECCs and scrubbing or using lower density, higher power, radiation-hardened semiconductors to achieve reliability [7,32]. Previous analyses of the tradeoffs between the use of simple ECCs, the additional hardware for the ECC, failure due to that additional hardware, and the system impact have been based on simplified analytical models; detailed analytical models are intractable.This paper introduces the idea of Markov modeling for SEU effects. Markov modeling allows extrapolation of chip failure rates to the subsystem and system level, allows more sophisticated tradeoff evaluations, and permits sensitivity analyses. The remainder of this paper is organized in three parts. Section 2 provides background about the SEU problem, expected SEU failure rates, and SEU control techniques. Section 3 introduces the use of Markov modeling techniques for memory subsystems and develops one model in detail. Section 4 presents the modeling results and generalizes the applicability of the modeling techniques.Single Event Upsets (SEUs) pose a serious threat to computer reliability and longevity. SEU effects are found at sea level, in airborne avionics, and in space. At the system level, SEUs in processors are controlled by replication and voting, watchdog processors, and tagged data schemes. SEUs in memory subsystems are controlled by periodically scrubbing words protected by an Error Control Code (ECC). The rate of memory scrubbing affects the performance and reliability of the entire computer system. There are tradeoffs between using radiation hardened semiconductors, scrubbing rates, and ECC capabilities. Previous tradeoff analyses have used simplified analytic models.The system effects of SEUs may be evaluated by Markov model...

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Verification of Single Event Upset Rate Estimation Methods with On-Orbit Observations

Cited by 31 publications

References 6 publications

Rate prediction for single event effects-a critique

Rate prediction for single event effects-a critique

The Rate of Single Event Upsets in Electronic Circuits onboard Spacecraft

System effects of single event upsets

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