2013
DOI: 10.2528/pier12081809
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Vertical Electric Fields and Field Change Parameters Due to Partly Inclined Lightning Leader Channels

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Cited by 5 publications
(5 citation statements)
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“…More exact calculations for a composite material radome need further considerations [23]. Moreover, the effects of non-vertical lightning channel [24] will also be considered in a future extension of the basic lightning-aircraft electrodynamics model presented here.…”
Section: Aircraft Into Transmission Line Circuit Modelmentioning
confidence: 99%
“…More exact calculations for a composite material radome need further considerations [23]. Moreover, the effects of non-vertical lightning channel [24] will also be considered in a future extension of the basic lightning-aircraft electrodynamics model presented here.…”
Section: Aircraft Into Transmission Line Circuit Modelmentioning
confidence: 99%
“…The sign convention that is used is important to describe an electric field change of a waveform of a flash. According to the atmospheric sign convention, a positive field (an upward deflection in the electric field waveform) corresponds to negative charges being lowered to the ground and vice versa [1][2][3][4]. Thus, a positive field change indicates that the flash is negative because negative charges are being lowered to the ground or positive charges are being lifted to the cloud.…”
Section: Introductionmentioning
confidence: 99%
“…However, there are a number of problems associated with the viable integration of bottom-up grown semiconductor NWs into standard integrated circuit complementary metaloxide-semiconductor (CMOS) devices' design and processing. The design of the CMOS devices is based on the controlled active channel of the logic devices lying coplanar to the Si-wafer substrate and requires a very high degree of control over placement of the devices so that they may be individually addressed for successful CMOS device operation (Gomes et al, 2013). Normally, bottom-up grown semiconductor NWs are grown as uncontrolled entangled meshes and consequently lack the prerequisite ordering, and control of placement required for CMOS standard manufacturing order than that and another issue is padding, connecting successful probing unit is also another problem.…”
Section: Introductionmentioning
confidence: 99%